From patchwork Wed Feb 12 15:59:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 3638951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C46F2BF13A for ; Wed, 12 Feb 2014 16:03:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C34A1201CE for ; Wed, 12 Feb 2014 16:03:49 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B8E6520122 for ; Wed, 12 Feb 2014 16:03:48 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDcGD-0002ML-2r; Wed, 12 Feb 2014 16:02:06 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDcFm-0007mG-Kb; Wed, 12 Feb 2014 16:01:38 +0000 Received: from mail-ea0-x22a.google.com ([2a00:1450:4013:c01::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDcEh-0007aT-U3 for linux-arm-kernel@lists.infradead.org; Wed, 12 Feb 2014 16:00:44 +0000 Received: by mail-ea0-f170.google.com with SMTP id g15so2749761eak.1 for ; Wed, 12 Feb 2014 08:00:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hbKOh8YnYv/m91VxGi6PdZadS6ouSfyU58TJOElxV7o=; b=VK16JObREgNUls7UxrcrO+dZZm8XuV7wZlZVe31GE6ysAVLnRrSIZ8S+NxEdW+1yPM bjf/Taij2RnQ+7n8cPL4kOlRndnZSNousKKcgcd3jMG+810op7uarNryZ/Zypo/xjKt+ jCRcIToGdsjPKUp/bjxOhl2eY8yl92Y35JmV5sGHNrThJgAw4FcOBHS018ffDfi4z0Je /ho1mO3zp5VeqGK1ya3O6Dm9Ur6Gey+1mbfFJkfawfzZBpx9HsdGmb1yEm9HqP+M9IRa ZFiEFOSHxoQZrP/UGc8J+9W2LRwlFb932wekYVSX8ScdqiP7YBiYY4OP9l5B1uujR379 SyEQ== X-Received: by 10.15.21.2 with SMTP id c2mr4198337eeu.77.1392220810078; Wed, 12 Feb 2014 08:00:10 -0800 (PST) Received: from topkick.lan (dslc-082-083-251-183.pools.arcor-ip.net. [82.83.251.183]) by mx.google.com with ESMTPSA id k41sm83539604een.19.2014.02.12.08.00.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Feb 2014 08:00:08 -0800 (PST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v3 06/13] pinctrl: mvebu: dove: provide generic mpp callbacks Date: Wed, 12 Feb 2014 16:59:29 +0100 Message-Id: <1392220776-30851-7-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1392220776-30851-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1390869573-27624-1-git-send-email-sebastian.hesselbarth@gmail.com> <1392220776-30851-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140212_110032_178561_E109FF91 X-CRM114-Status: GOOD ( 12.97 ) X-Spam-Score: -2.0 (--) Cc: Thomas Petazzoni , Andrew Lunn , Jason Cooper , Linus Walleij , linux-kernel@vger.kernel.org, Ezequiel Garcia , Gregory Clement , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks for generic mpp pins that will be used later. While at it, also make use of globally defined MPP macros. Signed-off-by: Sebastian Hesselbarth --- Cc: Linus Walleij Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Thomas Petazzoni Cc: Ezequiel Garcia Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- drivers/pinctrl/mvebu/pinctrl-dove.c | 48 +++++++++++++++++++++++++----------- 1 file changed, 34 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c index c7d365f9009c..b2e317e30759 100644 --- a/drivers/pinctrl/mvebu/pinctrl-dove.c +++ b/drivers/pinctrl/mvebu/pinctrl-dove.c @@ -49,48 +49,68 @@ #define DOVE_SD1_GPIO_SEL BIT(1) #define DOVE_SD0_GPIO_SEL BIT(0) -#define MPPS_PER_REG 8 -#define MPP_BITS 4 -#define MPP_MASK 0xf - #define CONFIG_PMU BIT(4) +static void __iomem *mpp_base; + +static int dove_mpp_ctrl_get(unsigned pid, unsigned long *config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + + *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK; + + return 0; +} + +static int dove_mpp_ctrl_set(unsigned pid, unsigned long config) +{ + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned long reg; + + reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift); + writel(reg | (config << shift), mpp_base + off); + + return 0; +} + static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config) { - unsigned off = (pid / MPPS_PER_REG) * MPP_BITS; - unsigned shift = (pid % MPPS_PER_REG) * MPP_BITS; + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); unsigned long func; if (pmu & (1 << pid)) { func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off); - *config = (func >> shift) & MPP_MASK; + *config = (func >> shift) & MVEBU_MPP_MASK; *config |= CONFIG_PMU; } else { func = readl(DOVE_MPP_VIRT_BASE + off); - *config = (func >> shift) & MPP_MASK; + *config = (func >> shift) & MVEBU_MPP_MASK; } return 0; } static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config) { - unsigned off = (pid / MPPS_PER_REG) * MPP_BITS; - unsigned shift = (pid % MPPS_PER_REG) * MPP_BITS; + unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; + unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); unsigned long func; if (config & CONFIG_PMU) { writel(pmu | (1 << pid), DOVE_PMU_MPP_GENERAL_CTRL); func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off); - func &= ~(MPP_MASK << shift); - func |= (config & MPP_MASK) << shift; + func &= ~(MVEBU_MPP_MASK << shift); + func |= (config & MVEBU_MPP_MASK) << shift; writel(func, DOVE_PMU_SIGNAL_SELECT_0 + off); } else { writel(pmu & ~(1 << pid), DOVE_PMU_MPP_GENERAL_CTRL); func = readl(DOVE_MPP_VIRT_BASE + off); - func &= ~(MPP_MASK << shift); - func |= (config & MPP_MASK) << shift; + func &= ~(MVEBU_MPP_MASK << shift); + func |= (config & MVEBU_MPP_MASK) << shift; writel(func, DOVE_MPP_VIRT_BASE + off); } return 0;