From patchwork Thu Feb 13 14:39:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Zabel X-Patchwork-Id: 3645801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3BA96BF13A for ; Thu, 13 Feb 2014 14:47:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D40A20121 for ; Thu, 13 Feb 2014 14:47:09 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 709F820179 for ; Thu, 13 Feb 2014 14:47:08 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDxXf-0007Nm-0t; Thu, 13 Feb 2014 14:45:31 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDxSl-000102-9Y; Thu, 13 Feb 2014 14:40:27 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WDxSF-0000uj-HW for linux-arm-kernel@lists.infradead.org; Thu, 13 Feb 2014 14:39:58 +0000 Received: from pizza.hi.pengutronix.de ([10.1.0.104] helo=pizza.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1WDxRo-0005Tb-Hi; Thu, 13 Feb 2014 15:39:28 +0100 From: Philipp Zabel To: Shawn Guo Subject: [PATCH v2 1/7] Documentation: Add device tree bindings for Freescale i.MX GPC Date: Thu, 13 Feb 2014 15:39:04 +0100 Message-Id: <1392302350-11729-2-git-send-email-p.zabel@pengutronix.de> X-Mailer: git-send-email 1.9.0.rc3 In-Reply-To: <1392302350-11729-1-git-send-email-p.zabel@pengutronix.de> References: <1392302350-11729-1-git-send-email-p.zabel@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.104 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140213_093956_322634_1C98449C X-CRM114-Status: GOOD ( 12.56 ) X-Spam-Score: -2.6 (--) Cc: Mark Rutland , devicetree@vger.kernel.org, kernel@pengutronix.de, Rob Herring , Philipp Zabel , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The i.MX6 contains a power controller that controls power gating and sequencing for the SoC's power domains. Signed-off-by: Philipp Zabel --- .../devicetree/bindings/power/fsl,imx-gpc.txt | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/fsl,imx-gpc.txt diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt new file mode 100644 index 0000000..3ec8c0e --- /dev/null +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt @@ -0,0 +1,61 @@ +Freescale i.MX General Power Controller +======================================= + +The i.MX6Q General Power Control (GPC) block contains DVFS load tracking +counters and Power Gating Control (PGC) for the CPU and PU (GPU/VPU) power +domains. + +Required properties: +- compatible: Should be "fsl,imx6q-gpc" +- reg: should be register base and length as documented in the + datasheet +- interrupts: Should contain GPC interrupt request 1 +- pu-supply: Link to the LDO regulator powering the PU power domain +- #address-cells, #size-cells: Should be <1> + +The gpc node should contain 'power-domain' subnodes for each power domain. +These serve as phandle targets for devices belonging to the power domain: + +Power domains controlled by a PGC register set +============================================== + +Required properties: +- compatible: Should be "fsl,imx6q-power-domain" +- reg: should be register base and length as documented in the + datasheet + +Specifying power domain for IP modules +====================================== + +IP cores belonging to a power domain should contain a 'power-domain' property +that is a phandle pointing to the power-domain subnode of the gpc device node. + +Required properties: +- power-domain: A phandle pointing to the power-domain device tree node + + +Example: + + gpc: gpc@020dc000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,imx6q-gpc"; + reg = <0x020dc000 0x4000>; + interrupts = <0 89 0x04 0 90 0x04>; + pu-supply = <®_pu>; + + pd_pu: power-domain@020dc260 { + compatible = "fsl,imx6q-power-domain"; + reg = <0x020dc260 0x10>; + }; + }; + +Example of a device that is part of a power domain: + + vpu: vpu@02040000 { + reg = <0x02040000 0x3c000>; + /* ... */ + power-domain = <&pd_pu>; + /* ... */ + }; +