From patchwork Tue Feb 18 06:41:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 3667351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A46799F1EE for ; Tue, 18 Feb 2014 06:40:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 93CDA201FD for ; Tue, 18 Feb 2014 06:40:45 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E295B201F7 for ; Tue, 18 Feb 2014 06:40:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFeMA-0005Gw-2K; Tue, 18 Feb 2014 06:40:38 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFeM7-0008LC-Mv; Tue, 18 Feb 2014 06:40:35 +0000 Received: from co1ehsobe005.messaging.microsoft.com ([216.32.180.188] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFeM4-0008Kb-5k for linux-arm-kernel@lists.infradead.org; Tue, 18 Feb 2014 06:40:33 +0000 Received: from mail181-co1-R.bigfish.com (10.243.78.252) by CO1EHSOBE028.bigfish.com (10.243.66.91) with Microsoft SMTP Server id 14.1.225.22; Tue, 18 Feb 2014 06:40:10 +0000 Received: from mail181-co1 (localhost [127.0.0.1]) by mail181-co1-R.bigfish.com (Postfix) with ESMTP id E24052000EE; Tue, 18 Feb 2014 06:40:09 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah21bch1fc6hzz1de098h8275dh1de097hz2dh87h2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h2516h2545h255eh1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail181-co1 (localhost.localdomain [127.0.0.1]) by mail181-co1 (MessageSwitch) id 1392705607295012_9830; Tue, 18 Feb 2014 06:40:07 +0000 (UTC) Received: from CO1EHSMHS025.bigfish.com (unknown [10.243.78.225]) by mail181-co1.bigfish.com (Postfix) with ESMTP id 38CEDBC0049; Tue, 18 Feb 2014 06:40:07 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS025.bigfish.com (10.243.66.35) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 18 Feb 2014 06:40:06 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.3.158.2; Tue, 18 Feb 2014 06:40:05 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.144]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s1I6dsKT032688; Mon, 17 Feb 2014 23:39:55 -0700 From: Shawn Guo To: Subject: [PATCH v5] bus: imx-weim: support CS GPR configuration Date: Tue, 18 Feb 2014 14:41:06 +0800 Message-ID: <1392705666-10995-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140218_014032_367558_8E12492C X-CRM114-Status: GOOD ( 20.51 ) X-Spam-Score: -0.7 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Alexander Shiyan , Philippe De Muyter , Huang Shijie , Rob Herring , kernel@pengutronix.de, Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY,UNRESOLVED_TEMPLATE autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For imx50-weim and imx6q-weim type of devices, there might a WEIM CS space configuration register in General Purpose Register controller, e.g. IOMUXC_GPR1 on i.MX6Q. Depending on which configuration of the following 4 is chosen for given system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 01111 correspondingly. CS0(128M) CS1(0M) CS2(0M) CS3(0M) CS0(64M) CS1(64M) CS2(0M) CS3(0M) CS0(64M) CS1(32M) CS2(32M) CS3(0M) CS0(32M) CS1(32M) CS2(32M) CS3(32M) The patch creates a function for such type of devices, which scans 'ranges' property of WEIM node and build the GPR value incrementally. Thus the WEIM CS GPR can be set up automatically at boot time. Signed-off-by: Shawn Guo Reviewed-by: Philippe De Muyter Tested-by: Philippe De Muyter --- Changes since v4: - Fix a typo in comment - Add fsl,weim-cs-gpr in the binding example - Check return of imx_weim_gpr_setup() Documentation/devicetree/bindings/bus/imx-weim.txt | 28 +++++++++- drivers/bus/imx-weim.c | 58 ++++++++++++++++++++ 2 files changed, 85 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt index 0fd76c4..6630d84 100644 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ b/Documentation/devicetree/bindings/bus/imx-weim.txt @@ -8,7 +8,12 @@ The actual devices are instantiated from the child nodes of a WEIM node. Required properties: - - compatible: Should be set to "fsl,-weim" + - compatible: Should contain one of the following: + "fsl,imx1-weim" + "fsl,imx27-weim" + "fsl,imx51-weim" + "fsl,imx50-weim" + "fsl,imx6q-weim" - reg: A resource specifier for the register space (see the example below) - clocks: the clock, see the example below. @@ -19,6 +24,26 @@ Required properties: 0 +Optional properties: + + - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of + devices, it should be the phandle to the system General + Purpose Register controller that contains WEIM CS GPR + register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible + values depending on the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or + what bootloader sets up in IOMUXC_GPR1[11:0] will be + used. + Timing property for child nodes. It is mandatory, not optional. - fsl,weim-cs-timing: The timing array, contains timing values for the @@ -43,6 +68,7 @@ Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr = <&gpr>; nor@0,0 { compatible = "cfi-flash"; diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c index 3ef58c8..f8ee13c 100644 --- a/drivers/bus/imx-weim.c +++ b/drivers/bus/imx-weim.c @@ -11,6 +11,9 @@ #include #include #include +#include +#include +#include struct imx_weim_devtype { unsigned int cs_count; @@ -56,6 +59,55 @@ static const struct of_device_id weim_id_table[] = { }; MODULE_DEVICE_TABLE(of, weim_id_table); +static int __init imx_weim_gpr_setup(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct property *prop; + const __be32 *p; + struct regmap *gpr; + u32 gprvals[4] = { + 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ + 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ + 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ + 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ + }; + u32 gprval = 0; + u32 val; + int cs = 0; + int i = 0; + + gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); + if (IS_ERR(gpr)) { + dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n"); + return 0; + } + + of_property_for_each_u32(np, "ranges", prop, p, val) { + if (i % 4 == 0) { + cs = val; + } else if (i % 4 == 3 && val) { + val = (val / SZ_32M) | 1; + gprval |= val << cs * 3; + } + i++; + } + + if (i == 0 || i % 4) + goto err; + + for (i = 0; i < ARRAY_SIZE(gprvals); i++) { + if (gprval == gprvals[i]) { + /* Found it. Set up IOMUXC_GPR1[11:0] with it. */ + regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval); + return 0; + } + } + +err: + dev_err(&pdev->dev, "Invalid 'ranges' configuration\n"); + return -EINVAL; +} + /* Parse and set the timing for this device. */ static int __init weim_timing_setup(struct device_node *np, void __iomem *base, const struct imx_weim_devtype *devtype) @@ -92,6 +144,12 @@ static int __init weim_parse_dt(struct platform_device *pdev, struct device_node *child; int ret; + if (devtype == &imx50_weim_devtype) { + ret = imx_weim_gpr_setup(pdev); + if (ret) + return ret; + } + for_each_child_of_node(pdev->dev.of_node, child) { if (!child->name) continue;