From patchwork Wed Aug 29 14:08:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1385201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id EE8713FC71 for ; Wed, 29 Aug 2012 14:13:04 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6ixA-0002MV-6X; Wed, 29 Aug 2012 14:09:08 +0000 Received: from mailout4.samsung.com ([203.254.224.34]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6ix5-0002MF-9a for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 14:09:05 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M9I001HGSMVDP40@mailout4.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 23:09:00 +0900 (KST) X-AuditID: cbfee61a-b7fc66d0000043b7-77-503e227b2aae Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 7C.17.17335.B722E305; Wed, 29 Aug 2012 23:09:00 +0900 (KST) Received: from amdc1227.localnet ([106.116.147.199]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M9I007AZSMUB620@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 23:08:59 +0900 (KST) From: Tomasz Figa To: linux-samsung-soc Subject: [PATCH v2] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 Date: Wed, 29 Aug 2012 16:08:53 +0200 Message-id: <1393767.3tjq8gL245@amdc1227> Organization: Samsung Poland R&D Center User-Agent: KMail/4.9 (Linux/3.5.2-gentoo; KDE/4.9.0; x86_64; ; ) MIME-version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHLMWRmVeSWpSXmKPExsVy+t9jAd0aJbsAg4s3GC02Pb7G6sDosXlJ fQBjFJdNSmpOZllqkb5dAlfGpKm9TAV7RSveH1nK1sD4SLCLkZNDQsBE4tuSpUwQtpjEhXvr 2boYuTiEBBYxSpx8MpsRJCEksJZJYvq3KhCbTUBN4nPDIzYQW0TAUuLi5/0sIA3MArsZJTZ3 rASbJCwQLvH/+BxmEJtFQFVi+6azLCA2r4CmxKfWq2DN/ALqEu+2PQWrFxVwlPg6CcLmFRCU +DH5Hlg9s4C8xL79U1khbC2J9TuPM01g5J+FpGwWkrJZSMoWMDKvYhRNLUguKE5KzzXUK07M LS7NS9dLzs/dxAgOtWdSOxhXNlgcYhTgYFTi4b3AbRsgxJpYVlyZe4hRgoNZSYRXj9UuQIg3 JbGyKrUoP76oNCe1+BCjNAeLkjgvf59hgJBAemJJanZqakFqEUyWiYNTqoGxSj5w4rRXXb1T Ga92Rfhd3VucnXU+tE78NsOs5Y4X+ZULrU+WxDskzisxDNJn05t9Y+rTB+wcS0IO3p5xVdN8 0ZwG14WicY5qlluC2D58ZCidsGLBqaoPKrvSF16bcPPMvJSAFScMTyuHfrmmcjT10THxxXva D7vJPfGMf/f4vtzTrpazcv8rlFiKMxINtZiLihMBz/ZKCDECAAA= X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.1 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.34 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kyungmin Park , Kukjin Kim , linux-arm-kernel , Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Exynos4412 uses different information register for each core. This patch adjusts the bring-up code to take that into account. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- arch/arm/mach-exynos/platsmp.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 36c3984..816a27d 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -34,8 +34,19 @@ extern void exynos4_secondary_startup(void); -#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ - S5P_INFORM5 : S5P_VA_SYSRAM) +static inline void __iomem *cpu_boot_reg_base(void) +{ + if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) + return S5P_INFORM5; + return S5P_VA_SYSRAM; +} + +static inline void __iomem *cpu_boot_reg(int cpu) +{ + if (soc_is_exynos4412()) + return cpu_boot_reg_base() + 4*cpu; + return cpu_boot_reg_base(); +} /* * control for which core is the next to come out of the secondary @@ -89,6 +100,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; + unsigned long phys_cpu = cpu_logical_map(cpu); /* * Set synchronisation state between this boot processor @@ -104,7 +116,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Note that "pen_release" is the hardware CPU ID, whereas * "cpu" is Linux's internal ID. */ - write_pen_release(cpu_logical_map(cpu)); + write_pen_release(phys_cpu); if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { __raw_writel(S5P_CORE_LOCAL_PWR_EN, @@ -138,7 +150,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) smp_rmb(); __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + cpu_boot_reg(phys_cpu)); gic_raise_softirq(cpumask_of(cpu), 1); if (pen_release == -1) @@ -186,6 +198,8 @@ void __init smp_init_cpus(void) void __init platform_smp_prepare_cpus(unsigned int max_cpus) { + int i; + if (!soc_is_exynos5250()) scu_enable(scu_base_addr()); @@ -195,6 +209,7 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(virt_to_phys(exynos4_secondary_startup), - CPU1_BOOT_REG); + for (i = 1; i < max_cpus; ++i) + __raw_writel(virt_to_phys(exynos4_secondary_startup), + cpu_boot_reg(cpu_logical_map(i))); }