From patchwork Wed Mar 5 16:23:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Moll X-Patchwork-Id: 3777391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 952059F1EE for ; Wed, 5 Mar 2014 16:24:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 39A6B20225 for ; Wed, 5 Mar 2014 16:24:52 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B668A20222 for ; Wed, 5 Mar 2014 16:24:50 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLEcB-0004w5-3P; Wed, 05 Mar 2014 16:24:15 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLEc6-00073u-62; Wed, 05 Mar 2014 16:24:10 +0000 Received: from fw-tnat.austin.arm.com ([217.140.110.23] helo=collaborate-mta1.arm.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLEbv-00071d-41 for linux-arm-kernel@lists.infradead.org; Wed, 05 Mar 2014 16:24:00 +0000 Received: from hornet.Cambridge.Arm.com (hornet.cambridge.arm.com [10.2.201.45]) by collaborate-mta1.arm.com (Postfix) with ESMTP id 2F6D313F69F; Wed, 5 Mar 2014 10:23:35 -0600 (CST) From: Pawel Moll To: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 1/2] video: ARM CLCD: Add DT support Date: Wed, 5 Mar 2014 16:23:25 +0000 Message-Id: <1394036606-17784-1-git-send-email-pawel.moll@arm.com> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140305_112359_320287_423AC44A X-CRM114-Status: GOOD ( 22.36 ) X-Spam-Score: 1.1 (+) Cc: Mark Rutland , Russell King , Jonathan Austin , Arnd Bergmann , Linus Walleij , Will Deacon , Tomi Valkeinen , Pawel Moll , Jean-Christophe Plagniol-Villard X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds basic DT bindings for the PL11x CLCD cells and make their fbdev driver use them. Signed-off-by: Pawel Moll --- Changes since v4: - simplified the pads description property and made it optional Changes since v3: - changed wording and order of interrupt-names and interrupts properties documentation - changed wording of arm,pl11x,framebuffer-base property documentation - cleaned up binding documentation indentation Changes since v2: - replaced video-ram phandle with arm,pl11x,framebuffer-base - replaced panel-* properties with arm,pl11x,panel-data-pads - replaced max-framebuffer-size with max-memory-bandwidth - modified clcdfb_of_init_tft_panel() to use the pads data and take differences between PL110 and PL110 into account Changes since v1: - minor code cleanups as suggested by Sylwester Nawrocki .../devicetree/bindings/video/arm,pl11x.txt | 83 ++++++++ drivers/video/Kconfig | 1 + drivers/video/amba-clcd.c | 219 +++++++++++++++++++++ 3 files changed, 303 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/arm,pl11x.txt diff --git a/Documentation/devicetree/bindings/video/arm,pl11x.txt b/Documentation/devicetree/bindings/video/arm,pl11x.txt new file mode 100644 index 0000000..75da7b7 --- /dev/null +++ b/Documentation/devicetree/bindings/video/arm,pl11x.txt @@ -0,0 +1,83 @@ +* ARM PrimeCell Color LCD Controller PL110/PL111 + +See also Documentation/devicetree/bindings/arm/primecell.txt + +Required properties: + +- compatible: must be one of: + "arm,pl110", "arm,primecell" + "arm,pl111", "arm,primecell" + +- reg: base address and size of the control registers block + +- interrupt-names: either the single entry "combined" representing a + combined interrupt output (CLCDINTR), or the four entries + "mbe", "vcomp", "lnbu", "fuf" representing the individual + CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts + +- interrupts: contains an interrupt specifier for each entry in + interrupt-names + +- clocks-names: should contain "clcdclk" and "apb_pclk" + +- clocks: contains phandle and clock specifier pairs for the entries + in the clock-names property. See + Documentation/devicetree/binding/clock/clock-bindings.txt + +Optional properties: + +- arm,pl11x,framebuffer-base: a pair of two 32-bit values, address and size, + defining the framebuffer that must be used; if not present, the + framebuffer may be located anywhere in the memory + +- arm,pl11x,tft-r0g0b0-pads: when connected to a TFT panel, an array of three + 32-bit values, defining the way CLD pads are wired up; this implicitly + defines available color modes, for example: + - PL111 TFT 4:4:4 panel: + arm,pl11x,tft-r0g0b0-pads = <4 15 20>; + - PL110 TFT (1:)5:5:5 panel: + arm,pl11x,tft-r0g0b0-pads = <1 7 13>; + - PL111 TFT (1:)5:5:5 panel: + arm,pl11x,tft-r0g0b0-pads = <3 11 19>; + - PL111 TFT 5:6:5 panel: + arm,pl11x,tft-r0g0b0-pads = <3 10 19>; + - PL110 and PL111 TFT 8:8:8 panel: + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped: + arm,pl11x,tft-r0g0b0-pads = <16 8 0>; + +- max-memory-bandwidth: maximum bandwidth in bytes per second that the + cell's memory interface can handle + +- display-timings: standard display timings sub-node, defining possible + video modes of a connected panel; for details see + Documentation/devicetree/bindings/video/display-timing.txt + +Example: + + clcd@1f0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x1f0000 0x1000>; + interrupt-names = "combined"; + interrupts = <14>; + clock-names = "clcdclk", "apb_pclk"; + clocks = <&v2m_oscclk1>, <&smbclk>; + + arm,pl11x,framebuffer-base = <0x18000000 0x00800000>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + max-memory-bandwidth = <36864000>; /* bps, 640x480@60 16bpp */ + display-timings { + native-mode = <&v2m_clcd_timing0>; + v2m_clcd_timing0: vga { + clock-frequency = <25175000>; + hactive = <640>; + hback-porch = <40>; + hfront-porch = <24>; + hsync-len = <96>; + vactive = <480>; + vback-porch = <32>; + vfront-porch = <11>; + vsync-len = <2>; + }; + }; + }; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index dade5b7..c1d25c9 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -317,6 +317,7 @@ config FB_ARMCLCD select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select VIDEOMODE_HELPERS if OF help This framebuffer device driver is for the ARM PrimeCell PL110 Colour LCD controller. ARM PrimeCells provide the building diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index 14d6b37..5a165dd 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c @@ -26,6 +26,11 @@ #include #include #include +#include +#include +#include +#include