From patchwork Fri Mar 7 13:09:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 3791111 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BF346BF540 for ; Fri, 7 Mar 2014 13:11:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E91E2201EF for ; Fri, 7 Mar 2014 13:11:11 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00CF520163 for ; Fri, 7 Mar 2014 13:11:11 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLuXZ-0006yP-Py; Fri, 07 Mar 2014 13:10:17 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLuXQ-00006d-Hs; Fri, 07 Mar 2014 13:10:08 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WLuX3-0008TO-Ml for linux-arm-kernel@lists.infradead.org; Fri, 07 Mar 2014 13:09:46 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s27D9OAm003637; Fri, 7 Mar 2014 07:09:24 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27D9NQY005392; Fri, 7 Mar 2014 07:09:24 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Fri, 7 Mar 2014 07:09:23 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27D9Eeo003003; Fri, 7 Mar 2014 07:09:21 -0600 From: Roger Quadros To: , Subject: [PATCH 2/8] ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate Date: Fri, 7 Mar 2014 15:09:05 +0200 Message-ID: <1394197751-28984-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1394197751-28984-1-git-send-email-rogerq@ti.com> References: <1394197751-28984-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140307_080945_853646_2CD87FE7 X-CRM114-Status: UNSURE ( 7.48 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) Cc: devicetree@vger.kernel.org, george.cherian@ti.com, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, kishon@ti.com, Tero Kristo , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rogerq@ti.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This clock gate description was missing in older Reference manuals. It is present on the SoC to provide 960MHz reference clock to the internal USB PHYs. Use l3init_960m_gfclk as parent of usb_otg_ss1_refclk960m and usb_otg_ss2_refclk960m. CC: Tero Kristo Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index e96da9a..b8d3a9d 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1386,6 +1386,14 @@ ti,dividers = <1>, <8>; }; + l3init_960m_gfclk: l3init_960m_gfclk { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&dpll_usb_clkdcoldo>; + ti,bit-shift = <8>; + reg = <0x06c0>; + }; + dss_32khz_clk: dss_32khz_clk { #clock-cells = <0>; compatible = "ti,gate-clock"; @@ -1533,7 +1541,7 @@ usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m { #clock-cells = <0>; compatible = "ti,gate-clock"; - clocks = <&dpll_usb_clkdcoldo>; + clocks = <&l3init_960m_gfclk>; ti,bit-shift = <8>; reg = <0x13f0>; }; @@ -1541,7 +1549,7 @@ usb_otg_ss2_refclk960m: usb_otg_ss2_refclk960m { #clock-cells = <0>; compatible = "ti,gate-clock"; - clocks = <&dpll_usb_clkdcoldo>; + clocks = <&l3init_960m_gfclk>; ti,bit-shift = <8>; reg = <0x1340>; };