From patchwork Mon Mar 10 21:40:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 3807481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BFCBDBF540 for ; Mon, 10 Mar 2014 21:45:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DB9FE202A1 for ; Mon, 10 Mar 2014 21:45:57 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BFC812022F for ; Mon, 10 Mar 2014 21:45:56 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WN7zG-0006ra-C1; Mon, 10 Mar 2014 21:44:00 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WN7y9-0006fQ-U2; Mon, 10 Mar 2014 21:42:45 +0000 Received: from mail-ig0-x229.google.com ([2607:f8b0:4001:c05::229]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WN7xd-0006XT-5i for linux-arm-kernel@lists.infradead.org; Mon, 10 Mar 2014 21:42:17 +0000 Received: by mail-ig0-f169.google.com with SMTP id h18so9806377igc.0 for ; Mon, 10 Mar 2014 14:41:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=4aqU9CFVLLY/FboHGoPBJY4H0RZ/ccxDOyyVhISGALQ=; b=rKTsSL6Rm6/3PoN9ldQVX2Fhc0JteWPDUvKStq9lMK7jCEb7R1+tPa14ugiCQ74gvp eSDBmK3503o6coV7oCW7ci6aLPmrxfRgX9J3A7/xK1oGciaVVLpNRDzdL2NT5YbH8r97 aILCzqFBNQlHxeYnvsFPvGxJj/SXkmrpaXYhOYLLhpNI/FbGG5Ag5gYBxo4r6yuX1Fdf wDa/I5fNM9nlYw6Z8Kt1ndd1ox5FdVjVvqyMjqgqFFck4RekAb6AZ0wcb7VoKI97+QY8 41SyMuSBEHmHMy37NASqTeIRPAX0Tz0mTPTgRz9+QX8ySTSmAVTXwNbvlLB7afuzkfgq bELA== X-Received: by 10.42.214.80 with SMTP id gz16mr29741674icb.6.1394487711930; Mon, 10 Mar 2014 14:41:51 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id w9sm40441425iga.10.2014.03.10.14.41.50 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 10 Mar 2014 14:41:51 -0700 (PDT) From: Soren Brinkmann To: Russell King , Greg Kroah-Hartman , Jiri Slaby , One Thousand Gnomes Subject: [PATCH v2 3/7] tty: xuartps: Refactor read-modify-writes Date: Mon, 10 Mar 2014 14:40:06 -0700 Message-Id: <1394487610-2419-4-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.9.0.1.g4196000 In-Reply-To: <1394487610-2419-1-git-send-email-soren.brinkmann@xilinx.com> References: <1394487610-2419-1-git-send-email-soren.brinkmann@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140310_174213_504313_357FBA8D X-CRM114-Status: GOOD ( 12.19 ) X-Spam-Score: -1.9 (-) Cc: Mark Rutland , devicetree@vger.kernel.org, Peter Crosthwaite , Rob Landley , Pawel Moll , Ian Campbell , linux-doc@vger.kernel.org, Michal Simek , linux-kernel@vger.kernel.org, Rob Herring , Soren Brinkmann , linux-serial@vger.kernel.org, Kumar Gala , Grant Likely , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A lot of read-modify-write sequences used a one-line statement which nests a readl() within a writel(). Convert this into code sequences that make the three steps more obvious. Signed-off-by: Soren Brinkmann --- drivers/tty/serial/xilinx_uartps.c | 52 ++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 28 deletions(-) diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index b00060052316..a4bd6242e72d 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -437,9 +437,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, spin_lock_irqsave(&xuartps->port->lock, flags); /* Disable the TX and RX to set baud rate */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&xuartps->port->lock, flags); @@ -464,9 +464,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, spin_lock_irqsave(&xuartps->port->lock, flags); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); while (xuartps_readl(XUARTPS_CR_OFFSET) & (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) @@ -479,10 +479,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb, */ xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&xuartps->port->lock, flags); @@ -631,9 +630,9 @@ static void xuartps_set_termios(struct uart_port *port, } /* Disable the TX and RX to set baud rate */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); /* * Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk @@ -651,20 +650,18 @@ static void xuartps_set_termios(struct uart_port *port, uart_update_timeout(port, termios->c_cflag, baud); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); - ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); /* * Clear the RX disable and TX disable bits and then set the TX enable * bit and RX enable bit to enable the transmitter and receiver. */ - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) - | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); @@ -1245,9 +1242,9 @@ static int xuartps_resume(struct device *device) spin_lock_irqsave(&port->lock, flags); /* Set TX/RX Reset */ - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), - XUARTPS_CR_OFFSET); + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); while (xuartps_readl(XUARTPS_CR_OFFSET) & (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) cpu_relax(); @@ -1256,10 +1253,9 @@ static int xuartps_resume(struct device *device) xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); /* Enable Tx/Rx */ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); - xuartps_writel( - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), - XUARTPS_CR_OFFSET); + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); spin_unlock_irqrestore(&port->lock, flags); } else {