| Message ID | 1395649643-9146-11-git-send-email-b.brezillon.dev@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 24/03/2014 at 09:27:22 +0100, Boris BREZILLON wrote : > Move at91sam9rl SoC to the new main/slow clock model. > > Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > arch/arm/boot/dts/at91sam9rl.dtsi | 47 +++++++++++++++++++++++++++++++------ > 1 file changed, 40 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi > index 63e1784..56220d8 100644 > --- a/arch/arm/boot/dts/at91sam9rl.dtsi > +++ b/arch/arm/boot/dts/at91sam9rl.dtsi > @@ -48,6 +48,20 @@ > reg = <0x20000000 0x04000000>; > }; > > + clocks { > + slow_xtal: slow_xtal { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; > + > + main_xtal: main_xtal { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; > + }; > + > ahb { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -548,17 +562,11 @@ > #size-cells = <0>; > #interrupt-cells = <1>; > > - clk32k: slck { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <32768>; > - }; > - > main: mainck { > compatible = "atmel,at91rm9200-clk-main"; > #clock-cells = <0>; > interrupts-extended = <&pmc AT91_PMC_MOSCS>; > - clocks = <&clk32k>; > + clocks = <&main_xtal>; > }; > > plla: pllack { > @@ -769,6 +777,31 @@ > interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; > status = "disabled"; > }; > + > + sckc@fffffd50 { > + compatible = "atmel,at91sam9x5-sckc"; > + > + slow_osc: slow_osc { > + compatible = "atmel,at91sam9x5-clk-slow-osc"; > + #clock-cells = <0>; > + atmel,startup-time-usec = <1200000>; > + clocks = <&slow_xtal>; > + }; > + > + slow_rc_osc: slow_rc_osc { > + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; > + #clock-cells = <0>; > + atmel,startup-time-usec = <75>; > + clock-frequency = <32768>; > + clock-accuracy = <50000000>; > + }; > + > + clk32k: slck { > + compatible = "atmel,at91sam9x5-clk-slow"; > + #clock-cells = <0>; > + clocks = <&slow_rc_osc &slow_osc>; > + }; > + }; > }; > }; > > -- > 1.7.9.5 >
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 63e1784..56220d8 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -48,6 +48,20 @@ reg = <0x20000000 0x04000000>; }; + clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -548,17 +562,11 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&clk32k>; + clocks = <&main_xtal>; }; plla: pllack { @@ -769,6 +777,31 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; status = "disabled"; }; + + sckc@fffffd50 { + compatible = "atmel,at91sam9x5-sckc"; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <1200000>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <75>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + }; }; };
Move at91sam9rl SoC to the new main/slow clock model. Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> --- arch/arm/boot/dts/at91sam9rl.dtsi | 47 +++++++++++++++++++++++++++++++------ 1 file changed, 40 insertions(+), 7 deletions(-)