From patchwork Mon Mar 24 08:27:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 3881731 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7BFD29F334 for ; Mon, 24 Mar 2014 08:34:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC925201E4 for ; Mon, 24 Mar 2014 08:34:44 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BBF332026C for ; Mon, 24 Mar 2014 08:34:43 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WS0Jo-000851-0S; Mon, 24 Mar 2014 08:33:17 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WS0JT-0006yq-Mp; Mon, 24 Mar 2014 08:32:55 +0000 Received: from mail-we0-x22a.google.com ([2a00:1450:400c:c03::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WS0Iv-0006sF-0g for linux-arm-kernel@lists.infradead.org; Mon, 24 Mar 2014 08:32:26 +0000 Received: by mail-we0-f170.google.com with SMTP id w61so3217681wes.29 for ; Mon, 24 Mar 2014 01:31:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NPych63O8ZA6wyP1QNheJ3SAe5UQsaZnERI+gItGOO4=; b=1CsoNNVEk43LvwTd4n/OYjHEO2LLrOnLiOQevSKuGWaKD7SNqs6WmNczUcJq3/UYtA i/G1Z1f5u5Ok6fKGwMp9wZxutBZu/osMTOQhfunsPgZOfI5F464W+CDFgRFxCQyJ0Zy6 E3iTIizWyfDBEftNmoWNiyScw2ihdqO/8N1a458paAINcTWgswh+UF+NT/U/y7ZLnUoB FkQVJkW23PKC+GxOI3kwRUFPArp4kh5xIETQ2SVsbSQ0RKaGxtoK62h3FsJlsYrtCBJZ BTrZd3PSq14RP4gPZ/yrW/I9kcSs1LamKcFqUq+Bm+m39eKtzlUjjdahSNX3B+QlbXmo 1nKA== X-Received: by 10.180.73.1 with SMTP id h1mr14215143wiv.10.1395649919194; Mon, 24 Mar 2014 01:31:59 -0700 (PDT) Received: from localhost.localdomain (col31-4-88-188-80-5.fbx.proxad.net. [88.188.80.5]) by mx.google.com with ESMTPSA id mw3sm35105666wic.7.2014.03.24.01.31.57 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 24 Mar 2014 01:31:58 -0700 (PDT) From: Boris BREZILLON To: Nicolas Ferre , Mike Turquette , Alexandre Belloni , Jean-Jacques Hiblot , Jean-Christophe PLAGNIOL-VILLARD Subject: [PATCH v2 05/11] ARM: at91/dt: move sama5d3 SoC to the new main/slow clk model Date: Mon, 24 Mar 2014 09:27:17 +0100 Message-Id: <1395649643-9146-6-git-send-email-b.brezillon.dev@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1395649643-9146-1-git-send-email-b.brezillon.dev@gmail.com> References: <1395649643-9146-1-git-send-email-b.brezillon.dev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140324_043221_262578_2BC78502 X-CRM114-Status: UNSURE ( 9.70 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) Cc: devicetree@vger.kernel.org, Boris BREZILLON , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Boris BREZILLON , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace the old main and clk definitions (fixed rate clk) by the new main and slow clk subtree definition (ck = mux(rc_osc, osc)). Signed-off-by: Boris BREZILLON --- arch/arm/boot/dts/sama5d3.dtsi | 61 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 55 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 3d5faf8..015797d 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -59,6 +59,18 @@ }; clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + adc_op_clk: adc_op_clk{ compatible = "fixed-clock"; #clock-cells = <0>; @@ -760,18 +772,29 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { - compatible = "fixed-clock"; + main_rc_osc: main_rc_osc { + compatible = "atmel,at91sam9x5-clk-main-rc-osc"; #clock-cells = <0>; - clock-frequency = <32768>; + interrupt-parent = <&pmc>; + interrupts = ; + clock-frequency = <12000000>; + clock-accuracy = <50000000>; }; - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = ; - clocks = <&clk32k>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91sam9x5-clk-main"; + #clock-cells = <0>; + interrupt-parent = <&pmc>; + interrupts = ; + clocks = <&main_rc_osc &main_osc>; }; plla: pllack { @@ -1100,6 +1123,32 @@ status = "disabled"; }; + sckc@fffffe50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffe50 0x4>; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + atmel,startup-time-usec = <75>; + }; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + atmel,startup-time-usec = <1200000>; + }; + + clk32k: slowck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + }; + rtc@fffffeb0 { compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffeb0 0x30>;