From patchwork Tue Mar 25 16:56:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 3888561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1E93BBF540 for ; Tue, 25 Mar 2014 16:58:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 559F7201FD for ; Tue, 25 Mar 2014 16:58:08 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5295D201F9 for ; Tue, 25 Mar 2014 16:58:07 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WSUfS-0005n6-3w; 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Wed, 26 Mar 2014 01:56:53 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac2.idc.renesas.com with ESMTP id BAG31002; Wed, 26 Mar 2014 01:56:53 +0900 X-IronPort-AV: E=Sophos;i="4.97,728,1389711600"; d="scan'208";a="156250259" Received: from unknown (HELO relay41.aps.necel.com) ([10.29.19.9]) by relmlii1.idc.renesas.com with ESMTP; 26 Mar 2014 01:56:53 +0900 Received: from DU0NOTES13.ad.ree.renesas.com ([172.29.24.131]) by relay41.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id s2PGtgK4017787; Wed, 26 Mar 2014 01:56:52 +0900 (JST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by DU0NOTES13.ad.ree.renesas.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2014032517564969-136775 ; Tue, 25 Mar 2014 17:56:49 +0100 From: Phil Edworthy To: linux-pci@vger.kernel.org X-Mailer: git-send-email 1.9.0 In-Reply-To: <1395766604-30926-1-git-send-email-phil.edworthy@renesas.com> References: <1395766604-30926-1-git-send-email-phil.edworthy@renesas.com> X-TNEFEvaluated: 1 Message-ID: <1395766604-30926-5-git-send-email-phil.edworthy@renesas.com> Date: Tue, 25 Mar 2014 16:56:39 +0000 Subject: [PATCH v5 4/9] ARM: shmobile: r8a7791: Add PCIe clock device tree nodes X-MIMETrack: Itemize by SMTP Server on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 25.03.2014 17:56:49, Serialize by Router on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 25.03.2014 17:56:52, Serialize complete at 25.03.2014 17:56:52 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140325_125716_875590_C23921C7 X-CRM114-Status: GOOD ( 10.04 ) X-Spam-Score: -2.3 (--) Cc: Phil Edworthy , linux-sh@vger.kernel.org, Magnus Damm , Valentine Barshak , Simon Horman , Bjorn Helgaas , Ben Dooks , LAKML X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the device tree clock nodes for PCIe Signed-off-by: Phil Edworthy --- arch/arm/boot/dts/r8a7791.dtsi | 7 +++++-- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 71bac2c..ccfba57 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -717,14 +717,17 @@ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, - <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>; + <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>, + <&mp_clk>; #clock-cells = <1>; renesas,clock-indices = < R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1 + R8A7791_CLK_PCIE >; clock-output-names = - "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1"; + "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1", + "pcie"; }; mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 30f82f2..d3e2cf5 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -51,6 +51,7 @@ #define R8A7791_CLK_SDHI1 12 #define R8A7791_CLK_SDHI0 14 #define R8A7791_CLK_MMCIF0 15 +#define R8A7791_CLK_PCIE 19 #define R8A7791_CLK_SSUSB 28 #define R8A7791_CLK_CMT1 29 #define R8A7791_CLK_USBDMAC0 30