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[88.188.80.5]) by mx.google.com with ESMTPSA id mw3sm9217422wic.7.2014.03.28.10.59.35 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 28 Mar 2014 10:59:36 -0700 (PDT) From: Boris BREZILLON To: Rob Landley , Nicolas Ferre , Jean-Christophe Plagniol-Villard , Thomas Gleixner Subject: [RFC PATCH v2 07/10] irqchip: atmel-aic: document new dt properties and children nodes Date: Fri, 28 Mar 2014 18:59:05 +0100 Message-Id: <1396029548-10928-8-git-send-email-b.brezillon.dev@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1396029548-10928-1-git-send-email-b.brezillon.dev@gmail.com> References: <1396029548-10928-1-git-send-email-b.brezillon.dev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140328_140002_571031_86EDB5BF X-CRM114-Status: GOOD ( 11.73 ) X-Spam-Score: -2.7 (--) Cc: devicetree@vger.kernel.org, Boris BREZILLON , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add irq muxing and irq-mapping dt bindings documentation. Signed-off-by: Boris BREZILLON --- .../bindings/interrupt-controller/atmel,aic.txt | 42 +++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt index 2742e9c..d46ec8e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt @@ -18,8 +18,33 @@ Required properties: The third cell is used to specify the irq priority from 0 (lowest) to 7 (highest). - reg: Should contain AIC registers location and length +- #address-cells: Shall be 2. The first cell encodes the irq line (or irq id). + The second cell encodes the register offset within the iomem range. +- #size-cells: Shall be 1. +- ranges: Defines the iomem ranges attached to a given irq line (e.i. irq + line 1 <=> SYSC range). - atmel,external-irqs: u32 array of external irqs. +Optional properties: +- atmel,irq-mapping: u32 mask array representing the available irqs: + e.i. : atmel,irq-mapping = <0xffff1fff> => irqs 13 to 15 are unavailables + +Optional children nodes: +- muxed irq entries: + Required properties: + * compatible: Shall be + "atmel,aic-mux-1reg-irq": irq enable/disable/retrieve-status is done by + setting/clearing/reading flags in a specific register + or + "atmel,aic-mux-3reg-irq": irq enable/disable/retrieve-status is done + by writing/reading flags in specific enable/disable/mask registers + * reg: encode the interrupt control register. + The first cell encode the irq line. + The second cell encode the offset register within its iomem range + The last cell encode the iomem region size (should always be set to 0x4). + * atmel,aic-mux-reg-mask: define the mask used to disable the interrupts + generated by the muxed entry. + Examples: /* * AIC @@ -29,11 +54,26 @@ Examples: interrupt-controller; interrupt-parent; #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <1>; reg = <0xfffff000 0x200>; + ranges = <0x1 0x0 0xffffc000 0x4000>; + + dbgu_irq: irq@1,320c { + compatible = "atmel,aic-mux-3reg-irq"; + reg = <1 0x320c 0x4>; + atmel,aic-mux-reg-mask = <0xc0001afb>; + }; + + pmc_irq: irq@1,3c64 { + compatible = "atmel,aic-mux-3reg-irq"; + reg = <1 0x3c64 0x4>; + atmel,aic-mux-reg-mask = <0xf0f>; + }; }; /* - * An interrupt generating device that is wired to an AIC. + * A device generating interrupts wired to the AIC. */ dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma";