From patchwork Fri Mar 28 21:12:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 3907471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5C3B8BF540 for ; Fri, 28 Mar 2014 21:16:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 71FE620274 for ; Fri, 28 Mar 2014 21:16:01 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F2D5200DF for ; Fri, 28 Mar 2014 21:16:00 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WTe6W-00079i-3t; Fri, 28 Mar 2014 21:14:21 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WTe68-0004S4-1b; Fri, 28 Mar 2014 21:13:56 +0000 Received: from mail-ig0-f170.google.com ([209.85.213.170]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WTe5Q-0004MG-6p for linux-arm-kernel@lists.infradead.org; Fri, 28 Mar 2014 21:13:14 +0000 Received: by mail-ig0-f170.google.com with SMTP id uq10so1296347igb.5 for ; Fri, 28 Mar 2014 14:12:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eY8kNRuoQqljCe3vyq2xmADmHFHCxX6lajdiwxpbH0Q=; b=ceUtts7IKEZYZCpfGxQ3rdP8oWDPUoCf/pKo94X2WFUNW0Jq8MScgcdYmx68oXc3tN UQVXun1a7alz4r6ArQZR4wAQRmst0GzVWjFnBxNhDTYTDYv7LwMIDoLj21egk9xgxJcs DEdCbaYu5IU1ywyuTD4XCiLlokudF0YlCvAPOWh4CQukgdNBTPJ+UMOYes15wOVxgDIt y8OH9kxv2UMwWqRzr2PumHiTOSxIGEL1Dhb1DmiP8LBMtrC/8/BIYeckzN4kegPH/7cT 8vaE7xSLR4Ui6ivgsq481/M45y/GVKUb6ap5i2JCDjqfBH8GlRLQyy+LPhPXtPtPZgKr NBbw== X-Gm-Message-State: ALoCoQkf3Io32qssRDh8ea2ZaPhEAFHeD4yiFnqoNeIIGmb+T1104rkiobOP+mND22N91orshcOg X-Received: by 10.43.151.7 with SMTP id kq7mr2880847icc.78.1396041169955; Fri, 28 Mar 2014 14:12:49 -0700 (PDT) Received: from localhost.localdomain (c-71-195-31-37.hsd1.mn.comcast.net. [71.195.31.37]) by mx.google.com with ESMTPSA id t1sm7139024igw.16.2014.03.28.14.12.48 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 28 Mar 2014 14:12:49 -0700 (PDT) From: Alex Elder To: linux@arm.linux.org.uk, linus.walleij@linaro.org, viresh.linux@gmail.com, shiraz.hashim@gmail.com, catalin.marinas@arm.com Subject: [RFC PATCH 6/7] ARM: ux500: use generic SMP spin-table routines Date: Fri, 28 Mar 2014 16:12:59 -0500 Message-Id: <1396041180-29897-7-git-send-email-elder@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396041180-29897-1-git-send-email-elder@linaro.org> References: <1396041180-29897-1-git-send-email-elder@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140328_171312_402181_69C9504F X-CRM114-Status: GOOD ( 24.04 ) X-Spam-Score: -2.6 (--) Cc: devicetree@vger.kernel.org, spear-devel@list.st.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Get rid of the ux500-specific code that implements the "holding pen" for secondary CPUs. Use the code defined in "arch/arm/kernel/smp.c" instead. Note: The original "holding pen" code for this machine used only the bottom 4 bits of the MPIDR to identify the processor id. The common code looks at the bottom 24 bits. The validity of this change needs to be verified. Signed-off-by: Alex Elder --- arch/arm/mach-ux500/Makefile | 2 +- arch/arm/mach-ux500/headsmp.S | 37 --------------------- arch/arm/mach-ux500/platsmp.c | 72 ++--------------------------------------- 3 files changed, 4 insertions(+), 107 deletions(-) delete mode 100644 arch/arm/mach-ux500/headsmp.S diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index d05ba75..0308fe1 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_MACH_MOP500) += board-mop500-sdi.o \ board-mop500-regulators.o \ board-mop500-pins.o \ board-mop500-audio.o -obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o CFLAGS_hotplug.o += -march=armv7-a diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S deleted file mode 100644 index 9cdea04..0000000 --- a/arch/arm/mach-ux500/headsmp.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2009 ST-Ericsson - * This file is based ARM Realview platform - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -/* - * U8500 specific entry point for secondary CPUs. - */ -ENTRY(u8500_secondary_startup) - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 -pen: ldr r7, [r6] - cmp r7, r0 - bne pen - - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup -ENDPROC(u8500_secondary_startup) - - .align 2 -1: .long . - .long pen_release diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index a44967f..6812aac 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -26,21 +26,6 @@ #include "db8500-regs.h" #include "id.h" -/* This is called from headsmp.S to wakeup the secondary core */ -extern void u8500_secondary_startup(void); - -/* - * Write pen_release in a way that is guaranteed to be visible to all - * observers, irrespective of whether they're taking part in coherency - * or not. This is necessary for the hotplug code to work reliably. - */ -static void write_pen_release(int val) -{ - pen_release = val; - smp_wmb(); - sync_cache_w(&pen_release); -} - static void __iomem *scu_base_addr(void) { if (cpu_is_u8500_family() || cpu_is_ux540_family()) @@ -51,57 +36,6 @@ static void __iomem *scu_base_addr(void) return NULL; } -static DEFINE_SPINLOCK(boot_lock); - -static void ux500_secondary_init(unsigned int cpu) -{ - /* - * let the primary processor know we're out of the - * pen, then head off into the C entry point - */ - write_pen_release(-1); - - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); -} - -static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) -{ - unsigned long timeout; - - /* - * set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from - * the holding pen - release it, then wait for it to flag - * that it has been released by resetting pen_release. - */ - write_pen_release(cpu_logical_map(cpu)); - - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - - timeout = jiffies + (1 * HZ); - while (time_before(jiffies, timeout)) { - if (pen_release == -1) - break; - } - - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; -} - static void __init wakeup_secondary(void) { void __iomem *backupram; @@ -118,7 +52,7 @@ static void __init wakeup_secondary(void) * is waiting for. This would wake up the secondary core from WFE */ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 - __raw_writel(virt_to_phys(u8500_secondary_startup), + __raw_writel(virt_to_phys(secondary_holding_pen), backupram + UX500_CPU1_JUMPADDR_OFFSET); #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 @@ -161,8 +95,8 @@ static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) struct smp_operations ux500_smp_ops __initdata = { .smp_init_cpus = ux500_smp_init_cpus, .smp_prepare_cpus = ux500_smp_prepare_cpus, - .smp_secondary_init = ux500_secondary_init, - .smp_boot_secondary = ux500_boot_secondary, + .smp_boot_secondary = smp_boot_secondary, + .smp_secondary_init = smp_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = ux500_cpu_die, #endif