diff mbox

[3/6] ARM: socfpga: dts: add i2c busses

Message ID 1396280404-2041-3-git-send-email-s.trumtrar@pengutronix.de (mailing list archive)
State New, archived
Headers show

Commit Message

Steffen Trumtrar March 31, 2014, 3:40 p.m. UTC
Add all 4 i2c busses.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

Comments

Dinh Nguyen April 1, 2014, 7:32 p.m. UTC | #1
On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> Add all 4 i2c busses.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 7867e7f..d0594c3 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -470,6 +470,50 @@
>  			status = "disabled";
>  		};
>  
> +		i2c0: i2c@0xffc04000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc04000 0x1000>;
> +			clock-frequency = <400000000>;

"clock-frequency" is not needed as the driver can get the clock
frequency from the clock driver.

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 158 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c@0xffc05000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc05000 0x1000>;
> +			clock-frequency = <100000000>;

Same..

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 159 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c2: i2c@0xffc06000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc06000 0x1000>;
> +			clock-frequency = <100000000>;

Same...

> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 160 0x4>;
> +			status = "disabled";
> +		};
> +
> +		i2c3: i2c@0xffc07000 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "snps,designware-i2c";
> +			reg = <0xffc07000 0x1000>;
> +			clock-frequency = <100000000>;

Same..

thanks,
Dinh
> +			clocks = <&l4_sp_clk>;
> +			interrupts = <0 161 0x4>;
> +			status = "disabled";
> +		};
> +
>  		L2: l2-cache@fffef000 {
>  			compatible = "arm,pl310-cache";
>  			reg = <0xfffef000 0x1000>;
Steffen Trumtrar April 2, 2014, 6:57 a.m. UTC | #2
Hi!

On Tue, Apr 01, 2014 at 02:32:20PM -0500, Dinh Nguyen wrote:
> On Mon, 2014-03-31 at 17:40 +0200, Steffen Trumtrar wrote:
> > Add all 4 i2c busses.
> > 
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >  arch/arm/boot/dts/socfpga.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 44 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> > index 7867e7f..d0594c3 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -470,6 +470,50 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		i2c0: i2c@0xffc04000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc04000 0x1000>;
> > +			clock-frequency = <400000000>;
> 
> "clock-frequency" is not needed as the driver can get the clock
> frequency from the clock driver.
> 

You are right of course. I will remove that.
Although, I think I remember seeing patches that add this functionality
to the driver. So you can change the speed setting. But even than you
are right, as something like that wouldn't belong here in the dtsi.


> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 158 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c1: i2c@0xffc05000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc05000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same..
> 
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 159 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c2: i2c@0xffc06000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc06000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same...
> 
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 160 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c3: i2c@0xffc07000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			compatible = "snps,designware-i2c";
> > +			reg = <0xffc07000 0x1000>;
> > +			clock-frequency = <100000000>;
> 
> Same..
> 
> thanks,
> Dinh
> > +			clocks = <&l4_sp_clk>;
> > +			interrupts = <0 161 0x4>;
> > +			status = "disabled";
> > +		};
> > +
> >  		L2: l2-cache@fffef000 {
> >  			compatible = "arm,pl310-cache";
> >  			reg = <0xfffef000 0x1000>;
> 
> 
> 

Thanks,
Steffen
diff mbox

Patch

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 7867e7f..d0594c3 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -470,6 +470,50 @@ 
 			status = "disabled";
 		};
 
+		i2c0: i2c@0xffc04000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc04000 0x1000>;
+			clock-frequency = <400000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 158 0x4>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@0xffc05000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc05000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 159 0x4>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@0xffc06000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc06000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 160 0x4>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@0xffc07000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c";
+			reg = <0xffc07000 0x1000>;
+			clock-frequency = <100000000>;
+			clocks = <&l4_sp_clk>;
+			interrupts = <0 161 0x4>;
+			status = "disabled";
+		};
+
 		L2: l2-cache@fffef000 {
 			compatible = "arm,pl310-cache";
 			reg = <0xfffef000 0x1000>;