From patchwork Thu Apr 3 02:40:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 3931241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 61BFABF540 for ; Thu, 3 Apr 2014 02:44:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C0282025B for ; Thu, 3 Apr 2014 02:44:24 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86C702021A for ; Thu, 3 Apr 2014 02:44:23 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVXd9-0007sm-Jg; Thu, 03 Apr 2014 02:43:51 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVXd5-0005mg-E8; Thu, 03 Apr 2014 02:43:47 +0000 Received: from mail-bl2on0105.outbound.protection.outlook.com ([65.55.169.105] helo=na01-bl2-obe.outbound.protection.outlook.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WVXcu-0005kS-Mw for linux-arm-kernel@lists.infradead.org; Thu, 03 Apr 2014 02:43:37 +0000 Received: from BY2FFO11FD016.protection.gbl (10.1.14.34) by BY2FFO11HUB021.protection.gbl (10.1.14.108) with Microsoft SMTP Server (TLS) id 15.0.908.10; Thu, 3 Apr 2014 02:42:48 +0000 Received: from SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) by BY2FFO11FD016.mail.protection.outlook.com (10.1.14.148) with Microsoft SMTP Server (TLS) id 15.0.918.6 via Frontend Transport; Thu, 3 Apr 2014 02:42:47 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by SJ-ITEXEDGE02.altera.priv.altera.com (66.35.236.232) with Microsoft SMTP Server id 8.3.348.2; Wed, 2 Apr 2014 19:29:39 -0700 Received: from linux-builds1.altera.com (linux-builds1.altera.com [137.57.188.114]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id s332giiD001778; Wed, 2 Apr 2014 19:42:46 -0700 (PDT) From: To: Subject: [PATCH 2/2] ARM: dts: socfpga: Remove hard coded clock-frequency property Date: Wed, 2 Apr 2014 21:40:34 -0500 Message-ID: <1396492834-26035-2-git-send-email-dinguyen@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396492834-26035-1-git-send-email-dinguyen@altera.com> References: <1396492834-26035-1-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: =?us-ascii?Q?CIP:66.35.236.232; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(1001?= =?us-ascii?Q?9001)(6009001)(458001)(189002)(199002)(80022001)(95416001)(5?= =?us-ascii?Q?0226001)(97336001)(47976001)(90146001)(48376002)(86362001)(4?= =?us-ascii?Q?396001)(2009001)(74366001)(47736001)(65816001)(97186001)(336?= =?us-ascii?Q?46001)(49866001)(76796001)(88136002)(95666003)(93916002)(853?= =?us-ascii?Q?06002)(69226001)(94316002)(99396002)(87286001)(87266001)(931?= =?us-ascii?Q?36001)(77982001)(89996001)(50986001)(53416003)(50466002)(986?= =?us-ascii?Q?76001)(31966008)(92566001)(56816005)(81686001)(47446002)(461?= =?us-ascii?Q?02001)(74706001)(59766001)(74876001)(62966002)(93516002)(764?= =?us-ascii?Q?82001)(77156001)(86152002)(56776001)(83072002)(76786001)(833?= =?us-ascii?Q?22001)(77096001)(19580405001)(53806001)(20776003)(36756003)(?= =?us-ascii?Q?74502001)(87936001)(97736001)(80976001)(85852003)(92726001)(?= =?us-ascii?Q?74662001)(81542001)(54316002)(84676001)(44976005)(1958039500?= =?us-ascii?Q?3)(6806004)(81816001)(81342001)(51856001)(47776003)(63696002?= =?us-ascii?Q?)(79102001); DIR:OUT; SFP:1102; SCL:1; SRVR:BY2FFO11HUB021; H:SJ-?= =?us-ascii?Q?ITEXEDGE02.altera.priv.altera.com; FPR:D193E7EA.E21490F4.C3F1?= =?us-ascii?Q?EFF6.9433B239.201EC; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A?= =?us-ascii?Q?:1;LANG:en;?= X-OriginatorOrg: altera.onmicrosoft.com X-Forefront-PRVS: 0170DAF08C Received-SPF: SoftFail (: domain of transitioning altera.com discourages use of 66.35.236.232 as permitted sender) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140402_224336_884277_FA405CE3 X-CRM114-Status: UNSURE ( 6.96 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) Cc: s.trumtrar@pengutronix.de, Dinh Nguyen , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen The timers and uart can get their clock frequencies using the common clock driver. Signed-off-by: Dinh Nguyen Reviewed-by: Steffen Trumtrar --- arch/arm/boot/dts/socfpga.dtsi | 10 ++++++++++ arch/arm/boot/dts/socfpga_arria5.dtsi | 24 ------------------------ arch/arm/boot/dts/socfpga_cyclone5.dtsi | 24 ------------------------ 3 files changed, 10 insertions(+), 48 deletions(-) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 039cebb..df43702 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -630,24 +630,32 @@ compatible = "snps,dw-apb-timer"; interrupts = <0 167 4>; reg = <0xffc08000 0x1000>; + clocks = <&l4_sp_clk>; + clock-names = "timer"; }; timer1: timer1@ffc09000 { compatible = "snps,dw-apb-timer"; interrupts = <0 168 4>; reg = <0xffc09000 0x1000>; + clocks = <&l4_sp_clk>; + clock-names = "timer"; }; timer2: timer2@ffd00000 { compatible = "snps,dw-apb-timer"; interrupts = <0 169 4>; reg = <0xffd00000 0x1000>; + clocks = <&osc1>; + clock-names = "timer"; }; timer3: timer3@ffd01000 { compatible = "snps,dw-apb-timer"; interrupts = <0 170 4>; reg = <0xffd01000 0x1000>; + clocks = <&osc1>; + clock-names = "timer"; }; uart0: serial0@ffc02000 { @@ -656,6 +664,7 @@ interrupts = <0 162 4>; reg-shift = <2>; reg-io-width = <4>; + clocks = <&l4_sp_clk>; }; uart1: serial1@ffc03000 { @@ -664,6 +673,7 @@ interrupts = <0 163 4>; reg-shift = <2>; reg-io-width = <4>; + clocks = <&l4_sp_clk>; }; rstmgr@ffd05000 { diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 373b340..12d1c2c 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi @@ -38,32 +38,8 @@ }; }; - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; }; - - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; }; }; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index 63a9513..bf51182 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -45,30 +45,6 @@ status = "okay"; }; - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; - - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; };