From patchwork Tue Apr 8 22:31:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 3951581 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 18B89BFF02 for ; Tue, 8 Apr 2014 22:31:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 536C6204AF for ; Tue, 8 Apr 2014 22:31:45 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5656B20499 for ; Tue, 8 Apr 2014 22:31:44 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXeY9-0005Dc-5D; Tue, 08 Apr 2014 22:31:25 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXeY6-00025y-AV; Tue, 08 Apr 2014 22:31:22 +0000 Received: from mail-ie0-f178.google.com ([209.85.223.178]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXeXz-000253-5J for linux-arm-kernel@lists.infradead.org; Tue, 08 Apr 2014 22:31:15 +0000 Received: by mail-ie0-f178.google.com with SMTP id lx4so1666365iec.9 for ; Tue, 08 Apr 2014 15:30:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5o7MrLJ+tjB5kaYdmUesO79K2NC3CQa41B1EV+jCz9s=; b=aVMMeDt2OgaXcrd7CmW4rnlOJTMIHdu9lUa026drw8Hcj0dmNdX49KhZGAAXHGu38V knZPaUkRJPvQY7h3orrpfE6kX9UVVRGHhAxBBHdCMOA4mvsEmyUv08fMGuEXKScy3BDz lWTgSVRWK9ecVl414TMjZsf5vS+GYlu0+Ur7r9K6G7xdnxof3YXJASFz62RmsqdsVFLc bLE81qXcIdzonvE1wKRFHsvNJVNoWQ41TyHS7E8SZ8lvljREkd0XJQHUYZ9aJpMsfW1R HB76RudyQ1oK+rJSwz62tq4mbqqzp6cIIChlZbR7Tbh/96TEDVkDEr+UWIucuzFzprF/ Fbog== X-Gm-Message-State: ALoCoQmZaaTTYjBVNAfIvPw3ZR54TpX+hsh8OKOPGZik3582dXPd+Em+Zi/rAuUzAKBFgxZBkGiL X-Received: by 10.42.119.134 with SMTP id b6mr5351725icr.31.1396996253241; Tue, 08 Apr 2014 15:30:53 -0700 (PDT) Received: from localhost.localdomain (c-71-195-31-37.hsd1.mn.comcast.net. [71.195.31.37]) by mx.google.com with ESMTPSA id t1sm6385811igw.16.2014.04.08.15.30.52 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 08 Apr 2014 15:30:52 -0700 (PDT) From: Alex Elder To: viresh.linux@gmail.com, shiraz.hashim@gmail.com Subject: [RFC PATCH RESEND] ARM: spear: send SGI to trigger secondary CPU start Date: Tue, 8 Apr 2014 17:31:28 -0500 Message-Id: <1396996288-32020-1-git-send-email-elder@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140408_183115_277840_DF7CD680 X-CRM114-Status: GOOD ( 13.15 ) X-Spam-Score: -2.6 (--) Cc: vk.vipin@gmail.com, spear-devel@list.st.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ARM spear machine uses the "holding pen" mechanism for starting secondary CPUs. Most implementations indicate it's a secondary core's time to start by writing its CPU id into a location and then signaling the core with a software-generated interrupt. The spear code does not send the signal. Comments elsewhere in the code seem to indicate it should: The BootMonitor waits until it receives a soft interrupt, and then the secondary CPU branches to this address. I suspect this is an oversight, and this patch proposes a remedy. *** I need the attention of a maintainer to verify this *** because I am unable to test this proposed change. Signed-off-by: Alex Elder --- arch/arm/mach-spear/platsmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c index 5c4a198..c9064fe 100644 --- a/arch/arm/mach-spear/platsmp.c +++ b/arch/arm/mach-spear/platsmp.c @@ -62,6 +62,8 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) flush_cache_all(); outer_flush_all(); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { smp_rmb();