From patchwork Thu Apr 10 08:05:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 3960301 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C4C53BFF02 for ; Thu, 10 Apr 2014 08:03:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EE58820616 for ; Thu, 10 Apr 2014 08:03:55 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9C8F820138 for ; Thu, 10 Apr 2014 08:03:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WY9xc-0004oG-E1; Thu, 10 Apr 2014 08:03:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WY9xX-0005L4-JG; Thu, 10 Apr 2014 08:03:45 +0000 Received: from co9ehsobe001.messaging.microsoft.com ([207.46.163.24] helo=co9outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WY9xU-0005Jy-5l for linux-arm-kernel@lists.infradead.org; Thu, 10 Apr 2014 08:03:40 +0000 Received: from mail168-co9-R.bigfish.com (10.236.132.232) by CO9EHSOBE026.bigfish.com (10.236.130.89) with Microsoft SMTP Server id 14.1.225.22; Thu, 10 Apr 2014 08:02:54 +0000 Received: from mail168-co9 (localhost [127.0.0.1]) by mail168-co9-R.bigfish.com (Postfix) with ESMTP id D5058AA010A; Thu, 10 Apr 2014 08:02:53 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h2148h1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah21bch1fc6h208chzz1de098h8275bh8275dh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h2516h2545h255eh25cch25f6h2605h268bh26d3h1155h) Received: from mail168-co9 (localhost.localdomain [127.0.0.1]) by mail168-co9 (MessageSwitch) id 1397116971362520_32424; Thu, 10 Apr 2014 08:02:51 +0000 (UTC) Received: from CO9EHSMHS007.bigfish.com (unknown [10.236.132.246]) by mail168-co9.bigfish.com (Postfix) with ESMTP id E18C3AC009D; Thu, 10 Apr 2014 08:02:34 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS007.bigfish.com (10.236.130.17) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 10 Apr 2014 08:02:35 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.3.174.2; Thu, 10 Apr 2014 08:02:56 +0000 Received: from victor.ap.freescale.net (victor.ap.freescale.net [10.192.241.62]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s3A82r1I024144; Thu, 10 Apr 2014 01:02:54 -0700 From: Liu Ying To: Subject: [PATCH] pwm: i.MX: Avoid sample fifo overflow for i.MX pwm version2 Date: Thu, 10 Apr 2014 16:05:11 +0800 Message-ID: <1397117111-19306-1-git-send-email-Ying.Liu@freescale.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140410_040340_354533_68166B41 X-CRM114-Status: GOOD ( 13.56 ) X-Spam-Score: -2.9 (--) Cc: linux-pwm@vger.kernel.org, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org, shawn.guo@freescale.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY,UNRESOLVED_TEMPLATE autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The i.MX pwm version2 is embedded in several i.MX SoCs, such as i.MX27, i.MX51 and i.MX6SL. There are four 16bit sample fifos in this IP, each of which determines the duty period of a PWM waveform in one full cycle. The IP spec mentions that we should not write a fourth sample because the fifo will become full and trigger a fifo write error(FWE) which will prevent the PWM from starting once it is enabled. In order to avoid any sample fifo overflow issue, this patch does software reset to clear all the sample fifos in the very beginning of the pwm configuration function. The fifo overflow issue can be reproduced by the following commands on the i.MX6SL evk platform, assuming we use pwm2 for the debug LED which is driven by the pin HSIC_STROBE and the maximal brightness is 255. echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 255 > /sys/class/leds/user/brightness Here, FWE happens(PWMSR register reads 0x58) and the LED can not be lighten. Cc: Sascha Hauer Cc: Shawn Guo Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Liu Ying --- drivers/pwm/pwm-imx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index cc47733..efdce53 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -38,6 +38,7 @@ #define MX3_PWMCR_DBGEN (1 << 22) #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) #define MX3_PWMCR_CLKSRC_IPG (1 << 16) +#define MX3_PWMCR_SWR (1 << 3) #define MX3_PWMCR_EN (1 << 0) struct imx_chip { @@ -107,6 +108,12 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, unsigned long period_cycles, duty_cycles, prescale; u32 cr; + /* do software reset in case fifo overflows */ + writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); + do { + cr = readl(imx->mmio_base + MX3_PWMCR); + } while (cr & MX3_PWMCR_SWR); + c = clk_get_rate(imx->clk_per); c = c * period_ns; do_div(c, 1000000000);