[v2,1/2] ahci: imx: add namespace for register enums

Commit Message

Shawn Guo April 18, 2014, 6:44 a.m. UTC

Update register enums a little bit to add proper namespace prefix, and
have the names match i.MX reference manual.

Signed-off-by: Shawn Guo <[e-mail]>
---
 drivers/ata/ahci_imx.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Tejun Heo May 2, 2014, 3:42 p.m. UTC | #1

On Fri, Apr 18, 2014 at 02:44:25PM +0800, Shawn Guo wrote:
> Update register enums a little bit to add proper namespace prefix, and
> have the names match i.MX reference manual.
> 
> Signed-off-by: Shawn Guo <[e-mail]>
> ---
>  drivers/ata/ahci_imx.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
> index 497c7ab..009a074 100644
> --- a/drivers/ata/ahci_imx.c
> +++ b/drivers/ata/ahci_imx.c
> @@ -29,9 +29,9 @@
>  #include "ahci.h"
>  
>  enum {
> -	PORT_PHY_CTL = 0x178,			/* Port0 PHY Control */
> -	PORT_PHY_CTL_PDDQ_LOC = 0x100000,	/* PORT_PHY_CTL bits */
> -	HOST_TIMER1MS = 0xe0,			/* Timer 1-ms */
> +	IMX_SATA_TIMER1MS			= 0x00e0,
> +	IMX_SATA_P0PHYCR			= 0x0178,

P0PHYCR isn't really readily dechipherable to "Port0 PHY Control".
Probably keeping the comment is better?  Also, constant names don't
necessarily have to be exactly the same as hardware manuals.  If
easier to understand and map back (via comment or whatever), using
more humanly-readable names is completely fine.  Also, maybe IMX_SATA_
is a bit too long for prefix?

Thanks.

Patch

diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index 497c7ab..009a074 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -29,9 +29,9 @@ 
 #include "ahci.h"
 
 enum {
-	PORT_PHY_CTL = 0x178,			/* Port0 PHY Control */
-	PORT_PHY_CTL_PDDQ_LOC = 0x100000,	/* PORT_PHY_CTL bits */
-	HOST_TIMER1MS = 0xe0,			/* Timer 1-ms */
+	IMX_SATA_TIMER1MS			= 0x00e0,
+	IMX_SATA_P0PHYCR			= 0x0178,
+	IMX_SATA_P0PHYCR_TEST_PDDQ		= 1 << 20,
 };
 
 enum ahci_imx_type {
@@ -156,8 +156,8 @@  static void ahci_imx_error_handler(struct ata_port *ap)
 	 * without full reset once the pddq mode is enabled making it
 	 * impossible to use as part of libata LPM.
 	 */
-	reg_val = readl(mmio + PORT_PHY_CTL);
-	writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL);
+	reg_val = readl(mmio + IMX_SATA_P0PHYCR);
+	writel(reg_val | IMX_SATA_P0PHYCR_TEST_PDDQ, mmio + IMX_SATA_P0PHYCR);
 	imx_sata_disable(hpriv);
 	imxpriv->no_device = true;
 }
@@ -248,7 +248,7 @@  static int imx_ahci_probe(struct platform_device *pdev)
 
 	/*
 	 * Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL,
-	 * and IP vendor specific register HOST_TIMER1MS.
+	 * and IP vendor specific register IMX_SATA_TIMER1MS.
 	 * Configure CAP_SSS (support stagered spin up).
 	 * Implement the port0.
 	 * Get the ahb clock rate, and configure the TIMER1MS register.
@@ -265,7 +265,7 @@  static int imx_ahci_probe(struct platform_device *pdev)
 	}
 
 	reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;
-	writel(reg_val, hpriv->mmio + HOST_TIMER1MS);
+	writel(reg_val, hpriv->mmio + IMX_SATA_TIMER1MS);
 
 	ret = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info, 0, 0);
 	if (ret)