From patchwork Thu Apr 24 16:57:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Capper X-Patchwork-Id: 4053011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 52592BFF02 for ; Thu, 24 Apr 2014 17:00:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 62506202F0 for ; Thu, 24 Apr 2014 17:00:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F3BD2024F for ; Thu, 24 Apr 2014 17:00:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WdMyn-0002kb-OJ; Thu, 24 Apr 2014 16:58:33 +0000 Received: from mail-wg0-f43.google.com ([74.125.82.43]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WdMyl-0002e0-RA for linux-arm-kernel@lists.infradead.org; Thu, 24 Apr 2014 16:58:32 +0000 Received: by mail-wg0-f43.google.com with SMTP id x13so2482267wgg.2 for ; Thu, 24 Apr 2014 09:58:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=JAW+zTjwAdkJENoqArQs1Ehwau9FO4phkRvcnoGCvj0=; b=f+wbr6PVYpzKmq9nsAIC3Q71Q9355epR2G4rmS3e8+jAvzBq3jB+PsKbdFHyZX0VRQ ZOtBggOy6G6TPzVKNjOrx3CkWNRt7FYc7mVBVsRyKv1cUci18KcFg8qPuJkkTut8hqqf gLp9aeVl9yNzqh6uXAMo5wT397P0BwPqGFMxUs7pwKVxCBgRZ/IWN+ICllll11aCW/rI dunQL68YprWLPKG3LPah105+TzGV9RKa5XPbp0ef6uwxMikUkdML7UWEeyatxge+4GPp rN2gbg20HVtpp557j5bR4kn950qUcN85VLMM+AN2qp5bXl9siLsZk+WSmcPz49dgPEgJ +o4Q== X-Gm-Message-State: ALoCoQkgBcq5Bj021UAuVWmDZtuATgoz+LM9J2rjcceEA14586raU5D2vOtAlMA8QpeGawZ2Ox0H X-Received: by 10.181.8.204 with SMTP id dm12mr3746144wid.1.1398358686982; Thu, 24 Apr 2014 09:58:06 -0700 (PDT) Received: from marmot.wormnet.eu (marmot.wormnet.eu. [188.246.204.87]) by mx.google.com with ESMTPSA id ej7sm203897wib.9.2014.04.24.09.58.05 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Apr 2014 09:58:06 -0700 (PDT) From: Steve Capper To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V2] arm64: mm: Add THP TLB entries to general mmu_gather Date: Thu, 24 Apr 2014 17:57:53 +0100 Message-Id: <1398358673-8429-1-git-send-email-steve.capper@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140424_095832_021908_61D86851 X-CRM114-Status: UNSURE ( 9.72 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: catalin.marinas@arm.com, Steve Capper X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When arm64 moved over to the core mmu_gather, it lost the logic to flush THP TLB entries (tlb_remove_pmd_tlb_entry was removed and the core implementation only signals that the mmu_gather needs a flush). This patch ensures that tlb_add_flush is called for THP TLB entries. Signed-off-by: Steve Capper Acked-by: Will Deacon --- Change in V2: moved __tlb_remove_pmd_tlb_entry to tlb.h to tidy it up. --- arch/arm64/include/asm/tlb.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index 72cadf5..80e2c08 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -19,6 +19,7 @@ #ifndef __ASM_TLB_H #define __ASM_TLB_H +#define __tlb_remove_pmd_tlb_entry __tlb_remove_pmd_tlb_entry #include @@ -99,5 +100,10 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, } #endif +static inline void __tlb_remove_pmd_tlb_entry(struct mmu_gather *tlb, pmd_t *pmdp, + unsigned long address) +{ + tlb_add_flush(tlb, address); +} #endif