From patchwork Sat Apr 26 04:52:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 4067351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 88340C0ACC for ; Sat, 26 Apr 2014 04:55:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 013622037F for ; Sat, 26 Apr 2014 04:55:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 576852034A for ; Sat, 26 Apr 2014 04:55:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wduc6-00009N-NV; Sat, 26 Apr 2014 04:53:22 +0000 Received: from smtp32.i.mail.ru ([94.100.177.92]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wdubc-0008Tu-Gq for linux-arm-kernel@lists.infradead.org; Sat, 26 Apr 2014 04:52:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=bXqgcLe3Pr6IVnGhXpKXARTmRDLWbL79te8xi6pmGxg=; b=RhoupQgD73viCPS9DcoadcNVdF+8J3aZu4LVQ16VoiLYI9922hi8ze6LqshocUFhZYCEzZ6HHitCJpQIUq2oktRCh1Bm6QOOesG3FKLKgtJLv7vDzXFZnNHT6E4pGca6bN+o+pza8qpxwG753AHppM0CJ8etgwxS5NMJWHzwMUs=; Received: from [5.18.98.0] (port=64411 helo=shc.zet) by smtp32.i.mail.ru with esmtpa (envelope-from ) id 1WdubD-0005PI-LZ; Sat, 26 Apr 2014 08:52:27 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/8] ARM: dts: imx27-phytec-phycore-rdk: Add CSI enable switch Date: Sat, 26 Apr 2014 08:52:10 +0400 Message-Id: <1398487933-5683-5-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1398487933-5683-1-git-send-email-shc_work@mail.ru> References: <1398487933-5683-1-git-send-email-shc_work@mail.ru> X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140425_215253_365706_3426FDB3 X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.1 (/) Cc: Alexander Shiyan , Sascha Hauer , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a GPIO fixed regulator which used on RDK to enable CSI bus. Signed-off-by: Alexander Shiyan --- arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts index ac18ccf..72c773e 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts @@ -38,6 +38,20 @@ }; }; + regulators { + regulator@2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csien>; + reg = <2>; + regulator-name = "CSI_EN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; + regulator-always-on; + }; + }; + usbphy { usbphy2: usbphy@2 { compatible = "usb-nop-xceiv"; @@ -83,6 +97,12 @@ &iomuxc { imx27_phycore_rdk { + pinctrl_csien: csiengrp { + fsl,pins = < + MX27_PAD_USB_OC_B__GPIO2_24 0x0 + >; + }; + pinctrl_cspi1cs1: cspi1cs1grp { fsl,pins = < MX27_PAD_CSPI1_SS1__GPIO4_27 0x0