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[86.14.225.190]) by mx.google.com with ESMTPSA id cj9sm9293870wid.1.2014.04.27.01.21.35 for (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128/128); Sun, 27 Apr 2014 01:21:36 -0700 (PDT) From: Vladimir Murzin To: xen-devel@lists.xenproject.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH] arm64: make bitops 32-bit tolerant Date: Sun, 27 Apr 2014 10:21:17 +0100 Message-Id: <1398590477-15375-1-git-send-email-murzin.v@gmail.com> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140427_012202_166847_1C9DBBC9 X-CRM114-Status: GOOD ( 10.38 ) X-Spam-Score: -0.1 (/) Cc: Ian.Campbell@citrix.com, catalin.marinas@arm.com, Vladimir Murzin , will.deacon@arm.com, david.vrabel@citrix.com, pranavkumar@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Xen assumes that bit operations are able to operate on 32-bit size and alignment [1]. For arm64 bitops are based on atomic exclusive load/store instructions to guarantee that changes are made atomically. However, these instructions require that address to be aligned to the data size. Because, by default, bitops operates on 64-bit size it implies that address should be aligned appropriately. All these lead to breakage of Xen assumption for bitops properties. This patch turns bitops to operate on 32-bit size/alignment. [1] http://www.gossamer-threads.com/lists/xen/devel/325613 Cc: catalin.marinas@arm.com Cc: will.deacon@arm.com Cc: david.vrabel@citrix.com Cc: Ian.Campbell@citrix.com Signed-off-by: Vladimir Murzin --- With this patch applied I was able to boot both Dom0 and DomU. @Pranav: Could I have your Tested-by on this patch? arch/arm64/lib/bitops.S | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/lib/bitops.S b/arch/arm64/lib/bitops.S index 7dac371..a6acfff 100644 --- a/arch/arm64/lib/bitops.S +++ b/arch/arm64/lib/bitops.S @@ -26,14 +26,14 @@ */ .macro bitop, name, instr ENTRY( \name ) - and w3, w0, #63 // Get bit offset + and w3, w0, #31 // Get bit offset eor w0, w0, w3 // Clear low bits mov x2, #1 add x1, x1, x0, lsr #3 // Get word offset lsl x3, x2, x3 // Create mask -1: ldxr x2, [x1] - \instr x2, x2, x3 - stxr w0, x2, [x1] +1: ldxr w2, [x1] + \instr w2, w2, w3 + stxr w0, w2, [x1] cbnz w0, 1b ret ENDPROC(\name ) @@ -41,15 +41,15 @@ ENDPROC(\name ) .macro testop, name, instr ENTRY( \name ) - and w3, w0, #63 // Get bit offset + and w3, w0, #31 // Get bit offset eor w0, w0, w3 // Clear low bits mov x2, #1 add x1, x1, x0, lsr #3 // Get word offset lsl x4, x2, x3 // Create mask -1: ldxr x2, [x1] +1: ldxr w2, [x1] lsr x0, x2, x3 // Save old value of bit - \instr x2, x2, x4 // toggle bit - stlxr w5, x2, [x1] + \instr w2, w2, w4 // toggle bit + stlxr w5, w2, [x1] cbnz w5, 1b dmb ish and x0, x0, #1