From patchwork Mon Apr 28 21:12:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 4082681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9E750BFF02 for ; Mon, 28 Apr 2014 21:16:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CC682201F4 for ; Mon, 28 Apr 2014 21:16:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC70220149 for ; Mon, 28 Apr 2014 21:16:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WesrP-0006sN-Iy; Mon, 28 Apr 2014 21:13:11 +0000 Received: from mail-ee0-x22a.google.com ([2a00:1450:4013:c00::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wesqx-0006oY-Ts for linux-arm-kernel@lists.infradead.org; Mon, 28 Apr 2014 21:12:44 +0000 Received: by mail-ee0-f42.google.com with SMTP id d17so5264621eek.15 for ; Mon, 28 Apr 2014 14:12:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bPi7JAwX6g7QZmv+7af71McUF9ZLDEMlguWE8V50bkM=; b=EfZDYVfcvu/Twx7akk04qqc3KN+/MjJiFDYsYXHVKdcMzWXB1oTyrFluvMfFoRtnPm PfaEFyiJe6GP6S6J57HSzWL4E9EzD8IeUXJRwpwVIW+chpote5axWKeGaH4YylCEjozM ajthvdp1mLMCeqsB2q7lbaX57vrAZuDhYCBcGr4e3Kr3dKZPR73digYhzugsk2sUW8ec 0lW0q6F6bPc1G6Olh1WkfEjuuBpdxrqvf2lCjZBqSLDmuOd5jqox7J01dS2Woo+/i/Y5 jBa+Z0N3BOpIE9MJeHQ0MQRnkzKTuyZesf0h9klGa0EP+b1vt9tHyuhTeom6AxkKOpI/ 80dw== X-Received: by 10.14.37.8 with SMTP id x8mr35367143eea.32.1398719536456; Mon, 28 Apr 2014 14:12:16 -0700 (PDT) Received: from topkick.lan (dslc-082-083-251-183.pools.arcor-ip.net. [82.83.251.183]) by mx.google.com with ESMTPSA id y7sm53449910eev.5.2014.04.28.14.12.14 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Apr 2014 14:12:15 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v2 3/3] irqchip: orion: reverse irq handling priority Date: Mon, 28 Apr 2014 23:12:08 +0200 Message-Id: <1398719528-23607-1-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1398540855-27367-4-git-send-email-sebastian.hesselbarth@gmail.com> References: <1398540855-27367-4-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140428_141244_117137_B69429E5 X-CRM114-Status: GOOD ( 11.97 ) X-Spam-Score: -0.1 (/) Cc: Andrew Lunn , Jason Cooper , linux-kernel@vger.kernel.org, Gregory Clement , Thomas Gleixner , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Non-DT irq handlers were working through irq causes from most-significant to least-significant bit, while DT irqchip driver does it the other way round. This revealed some more HW issues on Kirkwood peripheral IP, where spurious sdio irqs can happen although irqs are masked. Also, the generated binaries show that original non-DT order compared to DT order save two instructions for each bit count check: irqchip DT order with ffs(): 60: e3a06001 mov r6, #1 64: e2643000 rsb r3, r4, #0 68: e0033004 and r3, r3, r4 6c: e16f3f13 clz r3, r3 70: e263301f rsb r3, r3, #31 74: e1c44316 bic r4, r4, r6, lsl r3 78: e5971004 ldr r1, [r7, #4] Original non-DT order with fls(): 60: e3a07001 mov r7, #1 64: e16f3f14 clz r3, r4 68: e263301f rsb r3, r3, #31 6c: e1c44317 bic r4, r4, r7, lsl r3 70: e5951004 ldr r1, [r5, #4] Therefore, reverse irq bit handling back to original order by replacing ffs() with fls(). Signed-off-by: Sebastian Hesselbarth Acked-by: Jason Cooper --- Changelog: v1->v2: - reword commit msg to state less number of instructions Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Thomas Gleixner Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- drivers/irqchip/irq-orion.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index e25f246cd2fb..34d18b48bb78 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c @@ -42,7 +42,7 @@ __exception_irq_entry orion_handle_irq(struct pt_regs *regs) u32 stat = readl_relaxed(gc->reg_base + ORION_IRQ_CAUSE) & gc->mask_cache; while (stat) { - u32 hwirq = ffs(stat) - 1; + u32 hwirq = __fls(stat); u32 irq = irq_find_mapping(orion_irq_domain, gc->irq_base + hwirq); handle_IRQ(irq, regs); @@ -117,7 +117,7 @@ static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) gc->mask_cache; while (stat) { - u32 hwirq = ffs(stat) - 1; + u32 hwirq = __fls(stat); generic_handle_irq(irq_find_mapping(d, gc->irq_base + hwirq)); stat &= ~(1 << hwirq);