From patchwork Tue Apr 29 20:19:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 4089181 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 01D5CBFF02 for ; Tue, 29 Apr 2014 20:27:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 33364201F9 for ; Tue, 29 Apr 2014 20:27:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5368F201CE for ; Tue, 29 Apr 2014 20:27:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WfEWQ-000776-Pc; Tue, 29 Apr 2014 20:20:58 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WfEVl-0003ai-5X for linux-arm-kernel@lists.infradead.org; Tue, 29 Apr 2014 20:20:18 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3TKJrVR010920; Tue, 29 Apr 2014 15:19:53 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJrw7002430; Tue, 29 Apr 2014 15:19:53 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Tue, 29 Apr 2014 15:19:53 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJrRU030688; Tue, 29 Apr 2014 15:19:53 -0500 Received: from localhost (j-172-22-136-12.vpn.ti.com [172.22.136.12]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s3TKJqt25387; Tue, 29 Apr 2014 15:19:53 -0500 (CDT) From: Dan Murphy To: , , , Subject: [RFC 02/11] drivers: reset: dra7: Add reset data for dra7xx Date: Tue, 29 Apr 2014 15:19:41 -0500 Message-ID: <1398802790-29287-3-git-send-email-dmurphy@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398802790-29287-1-git-send-email-dmurphy@ti.com> References: <1398802790-29287-1-git-send-email-dmurphy@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140429_132017_316818_A7FFD063 X-CRM114-Status: GOOD ( 13.94 ) X-Spam-Score: -5.7 (-----) Cc: t-kristo@ti.com, s-anna@ti.com, Dan Murphy , p.zabel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the reset register data for the dra7xx SoC. Include the dt-bindings header to properly index the right reset node. Signed-off-by: Dan Murphy --- drivers/reset/ti/Makefile | 1 + drivers/reset/ti/reset-ti-data.h | 1 + drivers/reset/ti/reset-ti-dra7xx.c | 61 ++++++++++++++++++++++++++++++++++++ drivers/reset/ti/reset-ti.c | 3 ++ 4 files changed, 66 insertions(+) create mode 100644 drivers/reset/ti/reset-ti-dra7xx.c diff --git a/drivers/reset/ti/Makefile b/drivers/reset/ti/Makefile index 55ab3f5..622eb3b 100644 --- a/drivers/reset/ti/Makefile +++ b/drivers/reset/ti/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_RESET_TI) += reset-ti.o +obj-$(CONFIG_SOC_DRA7XX) += reset-ti-dra7xx.o diff --git a/drivers/reset/ti/reset-ti-data.h b/drivers/reset/ti/reset-ti-data.h index 6afdf37..5812ed5 100644 --- a/drivers/reset/ti/reset-ti-data.h +++ b/drivers/reset/ti/reset-ti-data.h @@ -55,4 +55,5 @@ struct ti_reset_data { u8 nr_resets; }; +extern struct ti_reset_data dra7_reset_data; #endif diff --git a/drivers/reset/ti/reset-ti-dra7xx.c b/drivers/reset/ti/reset-ti-dra7xx.c new file mode 100644 index 0000000..764f83e --- /dev/null +++ b/drivers/reset/ti/reset-ti-dra7xx.c @@ -0,0 +1,61 @@ +/* + * dra7xx reset data for PRCM Module + * + * Copyright 2014 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "reset-ti-data.h" + +static struct ti_reset_reg_data dra7_reset_reg_data[] = { + { + .rstctrl_offs = 0x1D00, + .rstctrl_bit = 0x0, + .rstst_offs = 0x1D04, + .rstst_bit = 0x0, + }, + { + .rstctrl_offs = 0x410, + .rstctrl_bit = 0x0, + .rstst_offs = 0x414, + .rstst_bit = 0x0, + }, + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x0, + .rstst_offs = 0x514, + .rstst_bit = 0x0, + }, /* IPU_CPU0 */ + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x1, + .rstst_offs = 0x514, + .rstst_bit = 0x1, + }, /* IPU_CPU1 */ + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x2, + .rstst_offs = 0x514, + .rstst_bit = 0x2, + }, /* IPU_MMU_CACHE */ + { + .rstctrl_offs = 0xf10, + .rstctrl_bit = 0, + .rstst_offs = 0xf14, + .rstst_bit = 0, + }, + { + .rstctrl_offs = 0x1310, + .rstctrl_bit = 0, + .rstst_offs = 0x1314, + .rstst_bit = 0, + }, +}; + +struct ti_reset_data dra7_reset_data = { + .reg_data = dra7_reset_reg_data, + .nr_resets = ARRAY_SIZE(dra7_reset_reg_data), +}; diff --git a/drivers/reset/ti/reset-ti.c b/drivers/reset/ti/reset-ti.c index 1d38069..486b77c 100644 --- a/drivers/reset/ti/reset-ti.c +++ b/drivers/reset/ti/reset-ti.c @@ -132,6 +132,9 @@ static struct reset_control_ops ti_reset_ops = { }; static const struct of_device_id ti_reset_of_match[] = { +#ifdef CONFIG_SOC_DRA7XX + { .compatible = "ti,dra7-resets", .data = &dra7_reset_data,}, +#endif {}, };