From patchwork Fri May 2 15:25:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 4102551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EA61ABFF02 for ; Fri, 2 May 2014 15:28:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 270BA20270 for ; Fri, 2 May 2014 15:28:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4946320353 for ; Fri, 2 May 2014 15:28:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgFLx-0008FG-3t; Fri, 02 May 2014 15:26:21 +0000 Received: from mail-pd0-x233.google.com ([2607:f8b0:400e:c02::233]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WgFLj-0007c7-QK for linux-arm-kernel@lists.infradead.org; Fri, 02 May 2014 15:26:08 +0000 Received: by mail-pd0-f179.google.com with SMTP id g10so2595577pdj.38 for ; Fri, 02 May 2014 08:25:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=vRD7/gsJBIotg98b59A1EC4HpUex5+295at3733baEQ=; b=J8UrI1KxYr5Yv84+fEiF6gZY7B9n0IFcLWcPKU0zX8TqyXOTaH3G4xLhH/PstKxEHK k3eytpeODeayvMArSHEayygwIplUxsOlCo4O/aCeRaVlZLl9JlWSUrbQ5kmnjQlGgvph +8wTPBF0a1oU6yZ5P/8Pjvqnq6zypS+/rJOUTA7dcll37UYKfxYNdGe+QtZ9MdTwtgQG ANU4TiipWSbMHgoz6nQHm3AbcTbA6tFtxyThvp8p8ZmKc1R3dw+jycv6QmlamCxd6eRu mFn2KdBCQ32R1jA5CFvrEp2Zvm5I8lLHDYF5zE+2KshePZCmFfevNMWzuOCmaYNqiitx vK0g== X-Received: by 10.66.197.135 with SMTP id iu7mr35223174pac.149.1399044346159; Fri, 02 May 2014 08:25:46 -0700 (PDT) Received: from localhost.localdomain ([122.171.93.130]) by mx.google.com with ESMTPSA id i10sm186063507pat.36.2014.05.02.08.25.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 02 May 2014 08:25:45 -0700 (PDT) From: Abhilash Kesavan To: nicolas.pitre@linaro.org, Dave.Martin@arm.com, lorenzo.pieralisi@arm.com, daniel.lezcano@linaro.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, t.figa@samsung.com, abrestic@chromium.org, thomas.ab@samsung.com, inderpal.s@samsung.com Subject: [PATCH v4 3/5] arm: exynos: Add generic cluster power control functions Date: Fri, 2 May 2014 20:55:31 +0530 Message-Id: <1399044331-15707-1-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398528348-21214-4-git-send-email-a.kesavan@samsung.com> References: <1398528348-21214-4-git-send-email-a.kesavan@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140502_082607_908981_311B33D7 X-CRM114-Status: GOOD ( 11.96 ) X-Spam-Score: 0.0 (/) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, kesavan.abhilash@gmail.com, arnd@arndb.de, will.deacon@arm.com, robh+dt@kernel.org, grant.likely@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add generic cluster power control functions for exynos based SoCS for cluster power up/down and to know the cluster status. Signed-off-by: Abhilash Kesavan --- arch/arm/mach-exynos/common.h | 3 +++ arch/arm/mach-exynos/pm.c | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-exynos/regs-pmu.h | 6 ++++++ 3 files changed, 39 insertions(+) diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index a7dbb5f..03b8bb2 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -66,5 +66,8 @@ extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); extern void exynos_cpu_powerdown(int cpu); extern void exynos_cpu_powerup(int cpu); extern int exynos_cpu_power_state(int cpu); +extern void exynos_cluster_powerdown(int cluster); +extern void exynos_cluster_powerup(int cluster); +extern int exynos_cluster_power_state(int cluster); #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 6651028..f02d864 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -136,6 +136,36 @@ int exynos_cpu_power_state(int cpu) S5P_CORE_LOCAL_PWR_EN); } +/** + * exynos_common_powerdown : power down the specified cluster + * @cluster : the cluster to power down + */ +void exynos_cluster_powerdown(int cluster) +{ + __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_powerup : power up the specified cluster + * @cluster : the cluster to power up + */ +void exynos_cluster_powerup(int cluster) +{ + __raw_writel(S5P_CORE_LOCAL_PWR_EN, + EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_power_state : returns the power state of the cluster + * @cluster : the cluster to retrieve the power state from + * + */ +int exynos_cluster_power_state(int cluster) +{ + return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) & + S5P_CORE_LOCAL_PWR_EN); +} + /* For Cortex-A9 Diagnostic and Power control register */ static unsigned int save_arm_register[2]; diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 0bdfcbc..6685ebf 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -127,6 +127,12 @@ #define EXYNOS_ARM_CORE_STATUS(_nr) \ (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4) +#define EXYNOS_ARM_COMMON_CONFIGURATION S5P_PMUREG(0x2500) +#define EXYNOS_COMMON_CONFIGURATION(_nr) \ + (EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr))) +#define EXYNOS_COMMON_STATUS(_nr) \ + (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4) + /* Only for EXYNOS4210 */ #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) #define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)