From patchwork Tue May 13 13:50:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 4167791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CF001BFF02 for ; Tue, 13 May 2014 13:54:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ED05020375 for ; Tue, 13 May 2014 13:54:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D38320373 for ; Tue, 13 May 2014 13:54:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkD77-0000ki-Eq; Tue, 13 May 2014 13:51:25 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkD73-0000F1-ML for linux-arm-kernel@lists.infradead.org; Tue, 13 May 2014 13:51:23 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id F0B40A4C; Tue, 13 May 2014 15:51:00 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 9BB239CE; Tue, 13 May 2014 15:50:40 +0200 (CEST) From: Boris BREZILLON To: Maxime Ripard Subject: [PATCH] ARM: sunxi: dt: declare the r_pio pin controller for A31 SoC Date: Tue, 13 May 2014 15:50:34 +0200 Message-Id: <1399989034-11010-1-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140513_065121_875928_D9DC6860 X-CRM114-Status: UNSURE ( 8.73 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.3 (/) Cc: Boris BREZILLON , Linus Walleij , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The A31 SoC has a different pin controller for PL and PM banks. Define this new controller in the device tree. Signed-off-by: Boris BREZILLON --- Hello, This patch depends on the PRCM series ([1]) which provides apb0 related stuff (apb0 clks and apb0 gates). Best Regards, Boris [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-May/254664.html arch/arm/boot/dts/sun6i-a31.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 81119a3..c46e3d7 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -297,6 +297,20 @@ }; }; + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun6i-a31-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <0 45 4>, + <0 46 4>; + clocks = <&apb0_gates 0>; + resets = <&apb0_rst 0>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + }; + ahb1_rst: reset@01c202c0 { #reset-cells = <1>; compatible = "allwinner,sun6i-a31-ahb1-reset";