From patchwork Tue May 13 16:14:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 4169531 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B57DABFF02 for ; Tue, 13 May 2014 16:19:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E8E892020A for ; Tue, 13 May 2014 16:19:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ACB6220304 for ; Tue, 13 May 2014 16:19:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkFO3-0003f2-8N; Tue, 13 May 2014 16:17:03 +0000 Received: from mail-pb0-f52.google.com ([209.85.160.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkFMW-0002Zb-NB for linux-arm-kernel@lists.infradead.org; Tue, 13 May 2014 16:15:29 +0000 Received: by mail-pb0-f52.google.com with SMTP id rr13so463552pbb.11 for ; Tue, 13 May 2014 09:15:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lKiH07fUJ63rv8x/iqoTg89vYd4qePk6LnceAnB3tYQ=; b=Hv1Mzra6MvuvTisUW0FkhgflgGAMndwxU86YQih/8pfrz/jNZJkDs0a23V9/1SR83s FgDJDcC9AjWAsFt6jydFFzdftz9rbYCSDJMQlpzw9sEL/yaa9Vslga/fCTZTqJIdNula CaAquSkPjrDvg240NwZU7DwCjxKGccaQ6Ky/j83wv+9nGCl6r+TSAMgpaliDhsRHml6K x2b9nIwElMRTq4Yf+VPWU1+oQlbMBP2zKkQ2MnMUp6tvCbDsFYmr0Qxu7XFAiF5xw/5a /aKHIKs9SJxH2WLsuHq31cLUmePTBunzOzQVrMRk+346/Cq5FqeJy5QLNhHbD5byo5IS JqFQ== X-Gm-Message-State: ALoCoQmhdwsoYv8ihU+P53SthM9vMGU9Atg8aI2QEmSoOaFszdylhWg3mV3ArnabzzHvPaHaNlJt X-Received: by 10.66.192.225 with SMTP id hj1mr65979981pac.142.1399997707867; Tue, 13 May 2014 09:15:07 -0700 (PDT) Received: from kamensky-w530.hsd1.ca.comcast.net (c-24-6-79-41.hsd1.ca.comcast.net. [24.6.79.41]) by mx.google.com with ESMTPSA id dd5sm28958360pbc.85.2014.05.13.09.15.05 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 May 2014 09:15:06 -0700 (PDT) From: Victor Kamensky To: kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, agraf@suse.de Subject: [PATCH v3 10/14] ARM64: KVM: store kvm_vcpu_fault_info est_el2 as word Date: Tue, 13 May 2014 09:14:02 -0700 Message-Id: <1399997646-4716-11-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1399997646-4716-1-git-send-email-victor.kamensky@linaro.org> References: <1399997646-4716-1-git-send-email-victor.kamensky@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140513_091528_812712_9A47D8A5 X-CRM114-Status: UNSURE ( 9.17 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: taras.kondratiuk@linaro.org, linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Victor Kamensky X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP esr_el2 field of struct kvm_vcpu_fault_info has u32 type. It should be stored as word. Current code works in LE case because existing puts least significant word of x1 into esr_el2, and it puts most significant work of x1 into next field, which accidentally is OK because it is updated again by next instruction. But existing code breaks in BE case. Signed-off-by: Victor Kamensky Acked-by: Christoffer Dall Acked-by: Marc Zyngier --- arch/arm64/kvm/hyp.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S index 2c56012..0620691 100644 --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -824,7 +824,7 @@ el1_trap: mrs x2, far_el2 2: mrs x0, tpidr_el2 - str x1, [x0, #VCPU_ESR_EL2] + str w1, [x0, #VCPU_ESR_EL2] str x2, [x0, #VCPU_FAR_EL2] str x3, [x0, #VCPU_HPFAR_EL2]