From patchwork Wed May 14 08:03:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 4173561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 08C5A9F3AE for ; Wed, 14 May 2014 08:07:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3922F2035C for ; Wed, 14 May 2014 08:07:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 62F1D2034E for ; Wed, 14 May 2014 08:07:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkUC7-0003dD-90; Wed, 14 May 2014 08:05:43 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkUBU-0002FI-9x for linux-arm-kernel@lists.infradead.org; Wed, 14 May 2014 08:05:04 +0000 Received: by mail-pb0-f49.google.com with SMTP id jt11so1382981pbb.22 for ; Wed, 14 May 2014 01:04:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=joAL16JqQetSYBaXn8fgobKGIob/ojuQ9fsGNeDbm9E=; b=lD+SXSm9igyGtz48u14cVZjhuVm5Pzo5SAtk+S9BGiSJn0GepQEuHWSjvJMZRIiuCk 5a2ddGym6AeDeHomm9NMnHYBYhEbQkORpOVfqM5vPlH0hxGtPK5pBSYWXmqySZwJ7/bz eUArf+mR9wSY2bzztK7cW1YuKmMGdWBCajNEhUc6CvPnyQ1VPYEkT5YmV04q9jpEXbTf fAsThEC+9HubYKOoKGAF7xCS3+9ESsftWLll+hYHGbleh4mWI4+rWlWKdJGr3PsPymTd zXmsqyAZfOVsyf1mEI3nQOQhIiochJFpLxZjNP0KptId5sol9B2l+hTTaP8SGgQhffnr n5Ew== X-Gm-Message-State: ALoCoQkjjhwFlHRXhIJvpQA72x3/VdRFjR0dioedx3+x9Dzh27n622cDhKAFLjE+OVK3LtY8YmJY X-Received: by 10.66.164.70 with SMTP id yo6mr2446367pab.85.1400054683116; Wed, 14 May 2014 01:04:43 -0700 (PDT) Received: from localhost.localdomain ([14.140.216.146]) by mx.google.com with ESMTPSA id as12sm4807422pac.43.2014.05.14.01.04.37 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 14 May 2014 01:04:41 -0700 (PDT) From: Chander Kashyap To: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 6/6] mcpm: exynos: populate suspend and powered_up callbacks Date: Wed, 14 May 2014 13:33:57 +0530 Message-Id: <1400054637-21505-7-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1400054637-21505-1-git-send-email-chander.kashyap@linaro.org> References: <1400054637-21505-1-git-send-email-chander.kashyap@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_010504_435319_10B1D54B X-CRM114-Status: GOOD ( 13.27 ) X-Spam-Score: -0.7 (/) Cc: Chander Kashyap , lorenzo.pieralisi@arm.com, daniel.lezcano@linaro.org, rjw@rjwysocki.net, Chander Kashyap , kgene.kim@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to support cpuidle through mcpm, suspend and powered-up callbacks are required in mcpm platform code. Hence populate the same callbacks. Signed-off-by: Chander Kashyap Signed-off-by: Chander Kashyap --- Changes in v5: 1. Add comment to address cache access while c-bit is cleared in SCLTR 2. Make exynos_powered_up static Changes in v4: None Changes in v3: 1. Removed coherency enablement after suspend failure. 2. Use generic function to poweron cpu. changes in v2: 1. Fixed typo: enynos_pmu_cpunr to exynos_pmu_cpunr arch/arm/mach-exynos/mcpm-exynos.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index c6bb3a4..623dfa7 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -253,10 +253,46 @@ static int exynos_power_down_finish(unsigned int cpu, unsigned int cluster) return -ETIMEDOUT; /* timeout */ } +static void exynos_powered_up(void) +{ + unsigned int mpidr, cpu, cluster; + + mpidr = read_cpuid_mpidr(); + cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); + + arch_spin_lock(&exynos_mcpm_lock); + if (cpu_use_count[cpu][cluster] == 0) + cpu_use_count[cpu][cluster] = 1; + arch_spin_unlock(&exynos_mcpm_lock); +} + +static void exynos_suspend(u64 residency) +{ + unsigned int mpidr, cpunr; + + exynos_power_down(); + + /* + * Execution reaches here only if cpu did not power down. + * Hence roll back the changes done in exynos_power_down function. + * + * CAUTION: "This function requires the stack data to be visible through + * power down and can only be executed on processors like A15 and A7 + * that hit the cache with the C bit clear in the SCTLR register." + */ + mpidr = read_cpuid_mpidr(); + cpunr = exynos_pmu_cpunr(mpidr); + + exynos_cpu_power_up(cpunr); +} + static const struct mcpm_platform_ops exynos_power_ops = { .power_up = exynos_power_up, .power_down = exynos_power_down, .power_down_finish = exynos_power_down_finish, + .suspend = exynos_suspend, + .powered_up = exynos_powered_up, }; static void __init exynos_mcpm_usage_count_init(void)