From patchwork Wed May 14 09:48:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 4173881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4F94DBFF02 for ; Wed, 14 May 2014 09:51:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8EF75201F9 for ; Wed, 14 May 2014 09:51:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C0283201BA for ; Wed, 14 May 2014 09:51:54 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkVoa-0001pq-1W; Wed, 14 May 2014 09:49:32 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkVoW-0001kS-NR for linux-arm-kernel@lists.infradead.org; Wed, 14 May 2014 09:49:29 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 07DF3815; Wed, 14 May 2014 11:49:08 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5A35080F; Wed, 14 May 2014 11:49:07 +0200 (CEST) From: =?UTF-8?q?Antoine=20T=C3=A9nart?= To: sebastian.hesselbarth@gmail.com, tj@kernel.org, kishon@ti.com Subject: [PATCH v3 2/6] Documentation: bindings: add the Berlin SATA PHY Date: Wed, 14 May 2014 11:48:58 +0200 Message-Id: <1400060942-10588-3-git-send-email-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400060942-10588-1-git-send-email-antoine.tenart@free-electrons.com> References: <1400060942-10588-1-git-send-email-antoine.tenart@free-electrons.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_024928_923233_F22C04D8 X-CRM114-Status: GOOD ( 10.46 ) X-Spam-Score: 0.3 (/) Cc: thomas.petazzoni@free-electrons.com, zmxu@marvell.com, devicetree@vger.kernel.org, =?UTF-8?q?Antoine=20T=C3=A9nart?= , linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org, alexandre.belloni@free-electrons.com, jszhang@marvell.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Berlin SATA PHY drives the PHY related to the SATA interface and allows to power up/down each PHY independently. Add the corresponding documentation. Signed-off-by: Antoine Ténart --- .../devicetree/bindings/phy/berlin-sata-phy.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/berlin-sata-phy.txt diff --git a/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt b/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt new file mode 100644 index 000000000000..b1e11a25775a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt @@ -0,0 +1,34 @@ +Berlin SATA PHY +--------------- + +Required properties: +- compatible: "marvell,berlin-sata-phy" +- #address-cells: number of cells to encode an address, must be 1 +- #size-cells: number of cells representing the size of an address, must be 0 +- reg: address and length of the register + +The SATA PHY node is a provider and should contain sub-nodes representing the +PHYs it handles, one per PHY. + +Required sub-node properties: +- reg: the PHY described. 0 or 1. +- #phy-cells: from the generic PHY bindings, must be 0 + +Example: + sata_phy: phy@f7e900a0 { + compatible = "marvell,berlin-sata-phy"; + reg = <0xf7e900a0 0x10>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + sata_phy0: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + sata_phy1: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + };