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Wed, 14 May 2014 15:24:38 +0200 From: Gabriel FERNANDEZ To: Srinivas Kandagatla , Maxime Coquelin , Patrice Chotard , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King Subject: [PATCH v2 09/10] ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9 Date: Wed, 14 May 2014 15:24:17 +0200 Message-Id: <1400073858-28912-10-git-send-email-gabriel.fernandez@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400073858-28912-1-git-send-email-gabriel.fernandez@linaro.org> References: <1400073858-28912-1-git-send-email-gabriel.fernandez@linaro.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.11.96, 1.0.14, 0.0.0000 definitions=2014-05-14_03:2014-05-14, 2014-05-14, 1970-01-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_062527_988274_C56271E2 X-CRM114-Status: GOOD ( 10.37 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, kernel@stlinux.com, linux-kernel@vger.kernel.org, Pankaj Dev , linux-arm-kernel@lists.infradead.org, Lee Jones , Gabriel Fernandez X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds DT entries for clockgen A9 Signed-off-by: Pankaj Dev Signed-off-by: Gabriel Fernandez --- arch/arm/boot/dts/stih415-clock.dtsi | 48 +++++++++++++++++++++++++++++------- 1 file changed, 39 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/stih415-clock.dtsi b/arch/arm/boot/dts/stih415-clock.dtsi index 8618851..5d161ee 100644 --- a/arch/arm/boot/dts/stih415-clock.dtsi +++ b/arch/arm/boot/dts/stih415-clock.dtsi @@ -24,15 +24,6 @@ }; /* - * ARM Peripheral clock for timers - */ - arm_periph_clk: arm_periph_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <500000000>; - }; - - /* * ClockGenAs on SASG1 */ clockgenA@fee62000 { @@ -499,5 +490,44 @@ /* Remaining outputs unused */ }; }; + + /* + * A9 PLL + */ + clockgenA9 { + reg = <0xfdde00d8 0x70>; + + CLOCKGEN_A9_PLL: CLOCKGEN_A9_PLL { + #clock-cells = <1>; + compatible = "st,stih415-plls-c32-a9", "st,clkgen-plls-c32"; + + clocks = <&CLK_SYSIN>; + clock-output-names = "CLOCKGEN_A9_PLL_ODF"; + }; + }; + + /* + * ARM CPU related clocks + */ + CLK_M_A9: CLK_M_A9 { + #clock-cells = <0>; + compatible = "st,stih415-clkgen-a9-mux", "st,clkgen-mux"; + reg = <0xfdde00d8 0x4>; + clocks = <&CLOCKGEN_A9_PLL 0>, + <&CLOCKGEN_A9_PLL 0>, + <&CLK_M_A0_DIV1 2>, + <&CLK_M_A9_EXT2F_DIV2>; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: CLK_M_A9_PERIPHS { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&CLK_M_A9>; + clock-div = <2>; + clock-mult = <1>; + }; }; };