From patchwork Wed May 14 18:17:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 4176651 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B7AA59F23C for ; Wed, 14 May 2014 18:22:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 013B320265 for ; Wed, 14 May 2014 18:22:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1C10F20149 for ; Wed, 14 May 2014 18:22:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkdmO-0001Sj-Tz; Wed, 14 May 2014 18:19:48 +0000 Received: from mail-yk0-f169.google.com ([209.85.160.169]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wkdky-0000R4-Ev for linux-arm-kernel@lists.infradead.org; Wed, 14 May 2014 18:18:21 +0000 Received: by mail-yk0-f169.google.com with SMTP id 200so1915393ykr.0 for ; Wed, 14 May 2014 11:17:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n4A57/pzzfYp9NtMN0S8qfjnQBy16sXhAP57dJt9M5Q=; b=cIs2Q5BFN60a/1YEP3jUMy3Vu0tbdsUzGV+4XPFBuS0VQOzVXMhlS8R0Oc4ywHlja9 pfBzvmKSDj6py9v7UEPj02Vkbg5dx1nlxcrdgkybAO/tDAmvQwR0CkXk4L+zrZGs37Mz PWNLAkAGFIbrRQPj3151y11FVWusy6VWVpSsFL6evzkaxos7oCFpVlCv0G1ZBiWy4YVQ e6F48RE0vQqjBBYz8FCdV4ppkN3gS+iBDWC5LHhuulHtV2OekBLuexd2A5UvqPQkixAg ZyGRIyyf5m0Z3AJjyNAxfen4wt3RMyRk62BWHR61tVO/jZz3WKWVb8yNURLISdO2fdOw oWHQ== X-Gm-Message-State: ALoCoQlcAzvMPyFcYaaRhSmHiJm0Lfzd76LZlZv1cvnjuLw6iBCILa9jdUlk7xF0ugroLgB/1JGg X-Received: by 10.236.178.39 with SMTP id e27mr868167yhm.98.1400091479123; Wed, 14 May 2014 11:17:59 -0700 (PDT) Received: from ards-macbook-pro.swisscom.com ([12.153.182.133]) by mx.google.com with ESMTPSA id c66sm3641080yhk.23.2014.05.14.11.17.56 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 14 May 2014 11:17:58 -0700 (PDT) From: Ard Biesheuvel To: catalin.marinas@arm.com, jussi.kivilinna@iki.fi, herbert@gondor.apana.org.au Subject: [PATCH v2 08/11] arm64/crypto: add shared macro to test for NEED_RESCHED Date: Wed, 14 May 2014 11:17:28 -0700 Message-Id: <1400091451-9117-9-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400091451-9117-1-git-send-email-ard.biesheuvel@linaro.org> References: <1400091451-9117-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_111820_637183_A9A989BF X-CRM114-Status: GOOD ( 10.27 ) X-Spam-Score: -0.7 (/) Cc: linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the asm macro definition 'b_if_no_resched' that performs a conditional branch depending on the preempt need_resched state. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index fd3e3924041b..296105fd3021 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -22,6 +22,11 @@ #include +#if defined(CONFIG_PREEMPT) || defined(CONFIG_PREEMPT_VOLUNTARY) +#include +#include +#endif + /* * Stack pushing/popping (register pairs only). Equivalent to store decrement * before, load increment after. @@ -146,3 +151,19 @@ lr .req x30 // link register #endif orr \rd, \lbits, \hbits, lsl #32 .endm + +/* + * Branch to 'lb' but only if we have not been tagged for preemption. + * + * Expects current->thread_info in ti, or NULL if running in interrupt + * context. reg is a scratch x register. + */ + .macro b_if_no_resched, ti, reg, lb +#if defined(CONFIG_PREEMPT) || defined(CONFIG_PREEMPT_VOLUNTARY) + cbz \ti, \lb /* have thread_info? */ + ldr \reg, [\ti, #TI_FLAGS] /* get flags */ + tbz \reg, #TIF_NEED_RESCHED, \lb /* need rescheduling? */ +#else + b \lb +#endif + .endm