From patchwork Wed May 14 20:15:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 4177851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E65649F23C for ; Wed, 14 May 2014 20:19:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 05D0020254 for ; Wed, 14 May 2014 20:19:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB21320165 for ; Wed, 14 May 2014 20:19:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkfcE-0006Y1-GH; Wed, 14 May 2014 20:17:26 +0000 Received: from mail-ee0-x229.google.com ([2a00:1450:4013:c00::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wkfat-0003eH-Ir for linux-arm-kernel@lists.infradead.org; Wed, 14 May 2014 20:16:05 +0000 Received: by mail-ee0-f41.google.com with SMTP id t10so61540eei.0 for ; Wed, 14 May 2014 13:15:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TTsbZHp9lGqWZtBokuk51vO/CNVIEE1xFlBC2MzEAnQ=; b=hjE9YNgS7c8ETej1M9mjwN2gY8S7A6B0RwhwqG+lgHbQ6IR6XTnoN1LMqV5Md+gJDN L6/4KxwdkjCkFTskJHL6pXsRFFx7few6/luKtVPkinlvSyYirl7jWg2K/NWRn/J00Vht bKaKFgUjQXEYNrBWqnF/YntTY+HXG2j79PE6+MdOIM28IeFjavurmsLM7PJJLD/e5eqs utYJdGO4gCHoIHqvwM9smNv0gliuWsmhG7tkaJRX7WYdGKCRBWKk7BtnRKKLr7WpKrlf X9/1BA0oY8xQspN7+hP3tNFIMd3oA1pE6qfg62abcCjqH1OCQrt1t4otC/VBBE/7POC3 FlqQ== X-Received: by 10.14.109.201 with SMTP id s49mr6522295eeg.88.1400098541414; Wed, 14 May 2014 13:15:41 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-144.pools.arcor-ip.net. [82.83.214.144]) by mx.google.com with ESMTPSA id ci54sm7408379eeb.19.2014.05.14.13.15.35 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 May 2014 13:15:39 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v2 09/10] ARM: dts: berlin: convert BG2 to DT clock nodes Date: Wed, 14 May 2014 22:15:20 +0200 Message-Id: <1400098522-14770-10-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1400098522-14770-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> <1400098522-14770-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_131603_964558_EEFA7131 X-CRM114-Status: GOOD ( 11.99 ) X-Spam-Score: -0.1 (/) Cc: Mark Rutland , Jisheng Zhang , Mike Turquette , Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Alexandre Belloni , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts Berlin BG2 SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. While at it, also fix up twdclk which is running at cpuclk/3 instead of sysclk. Signed-off-by: Sebastian Hesselbarth --- Changelog: v1->v2: - dropped of_clk_create_name() usage required unique node names for clocks and plls - added clock-output-names to allow fixed-factor-clock to find its parent name Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Mike Turquette Cc: Alexandre Belloni Cc: Jisheng Zhang Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2.dtsi | 207 +++++++++++++++++++++++++++++++++++------ 1 file changed, 178 insertions(+), 29 deletions(-) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 57cadd31f4e1..edeecb711e97 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -37,24 +38,18 @@ }; }; - clocks { - smclk: sysmgr-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - cfgclk: cfg-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; - sysclk: system-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <400000000>; - }; + twdclk: twdclk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&coreclk CLKID_CPU>; + clock-mult = <1>; + clock-div = <3>; }; soc { @@ -88,7 +83,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = ; - clocks = <&sysclk>; + clocks = <&twdclk>; }; apb@e80000 { @@ -175,7 +170,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -184,7 +179,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -193,7 +188,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -202,7 +197,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -211,7 +206,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -220,7 +215,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -229,7 +224,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -238,7 +233,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -253,11 +248,165 @@ }; }; + syspll: syspll@ea0014 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0014 0x14>; + clocks = <&refclk>; + }; + + mempll: mempll@ea0028 { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea0028 0x14>; + clocks = <&refclk>; + }; + + cpupll: cpupll@ea003c { + compatible = "marvell,berlin2-pll"; + #clock-cells = <0>; + reg = <0xea003c 0x14>; + clocks = <&refclk>; + }; + + avpll: avpll@ea0040 { + compatible = "marvell,berlin2-avpll"; + #clock-cells = <2>; + reg = <0xea0050 0x100>; + clocks = <&refclk>; + }; + + coreclk: core-clock@ea0150 { + compatible = "marvell,berlin2-core-clocks"; + #clock-cells = <1>; + reg = <0xea0150 0x1c>; + clocks = <&refclk>, <&syspll>, <&mempll>, <&cpupll>, + <&avpll 0 1>, <&avpll 0 2>, + <&avpll 0 3>, <&avpll 0 4>, + <&avpll 0 5>, <&avpll 0 6>, + <&avpll 0 7>, <&avpll 0 8>, + <&avpll 1 1>, <&avpll 1 2>, + <&avpll 1 3>, <&avpll 1 4>, + <&avpll 1 5>, <&avpll 1 6>, + <&avpll 1 7>, <&avpll 1 8>; + clock-names = "refclk", "syspll", "mempll", "cpupll", + "avpll_a1", "avpll_a2", "avpll_a3", "avpll_a4", + "avpll_a5", "avpll_a6", "avpll_a7", "avpll_a8", + "avpll_b1", "avpll_b2", "avpll_b3", "avpll_b4", + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; + clock-output-names = "sys", "cpu", "drmfigo", "cfg", + "gfx", "zsp", "perif", "pcube", "vscope", + "nfc_ecc", "vpp", "app", "audio0", "audio2", + "audio3", "audio1", "geth0", "geth1", "sata", + "ahbapb", "usb0", "usb1", "pbridge", "sdio0", + "sdio1", "nfc", "smemc", "audiohd", "video0", + "video1", "video2"; + }; + generic-regs@ea0184 { compatible = "marvell,berlin-generic-regs", "syscon"; reg = <0xea0184 0x10>; }; + gfx3dcore_clk: gfx3dcore@ea022c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea022c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dsys_clk: gfx3dsys@ea0230 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0230 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + arc_clk: arc@ea0234 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0234 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + vip_clk: vip@ea0238 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0238 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio0xin_clk: sdio0xin@ea023c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea023c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio1xin_clk: sdio1xin@ea0240 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0240 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gfx3dextra_clk: gfx3dextra@ea0244 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0244 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + gc360_clk: gc360@ea024c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea024c 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + + sdio_dllmst_clk: sdio_dllmst@ea0250 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0250 0x4>; + clocks = <&syspll>, + <&avpll 1 4>, <&avpll 1 5>, + <&avpll 1 6>, <&avpll 1 7>; + clock-names = "mux_bypass", + "mux0", "mux1", "mux2", "mux3"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; @@ -305,7 +454,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -315,7 +464,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -325,7 +474,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <10>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; };