From patchwork Wed May 14 20:15:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 4177841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3A1D4BFF02 for ; Wed, 14 May 2014 20:19:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 35E3720254 for ; Wed, 14 May 2014 20:19:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B3BE20165 for ; Wed, 14 May 2014 20:19:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkfcM-0006k7-QX; Wed, 14 May 2014 20:17:34 +0000 Received: from mail-ee0-x231.google.com ([2a00:1450:4013:c00::231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wkfav-0003eR-3X for linux-arm-kernel@lists.infradead.org; Wed, 14 May 2014 20:16:06 +0000 Received: by mail-ee0-f49.google.com with SMTP id e53so56790eek.36 for ; Wed, 14 May 2014 13:15:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K5UJ+esAms2IKumcO7ERXHfHg3OisI0oi1w3F0r3yvU=; b=YWPUKBYJsuNf3qjPNoCZ1ry5MJ+yNAosZzCN0cd7oPKav7QQaV3QfL2yO6e3ncXnh1 OHXoY6UrtdDlu3yyMleFscQnNyfid4zTvrsVKI+gVq4tuMTIgTDwPkNoQjoKyQX0cqsl YcyKxoWUawHl3HPhKXOcOS5IZZLV1cqn8q6xGk/0Dl93naW30azkN23wEtx/tK2xslKF Ozl23pMW4/WarVLAPkAeM7H5CBZ2D/hpUbkLPyamGgHdWRGnwNAcKVj3UrgNY3GqvdIf EB0WsG5ZeD3uzwN8kVTn9C7YxWBpzaIKaPjOj6mOUA+mCBJhR7LYvRnkHphljom2H/48 30LA== X-Received: by 10.14.172.69 with SMTP id s45mr8117872eel.14.1400098542948; Wed, 14 May 2014 13:15:42 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-144.pools.arcor-ip.net. [82.83.214.144]) by mx.google.com with ESMTPSA id l4sm7415998eey.13.2014.05.14.13.15.35 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 May 2014 13:15:39 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v2 10/10] ARM: dts: berlin: convert BG2Q to DT clock nodes Date: Wed, 14 May 2014 22:15:21 +0200 Message-Id: <1400098522-14770-11-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1400098522-14770-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com> <1400098522-14770-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_131605_552924_CCED01D2 X-CRM114-Status: GOOD ( 11.40 ) X-Spam-Score: -0.1 (/) Cc: Mark Rutland , Jisheng Zhang , Mike Turquette , Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Alexandre Belloni , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alexandre Belloni This converts Berlin BG2Q SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. Signed-off-by: Alexandre Belloni Signed-off-by: Sebastian Hesselbarth --- Changelog: v1->v2: - initial version Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Mike Turquette Cc: Alexandre Belloni Cc: Jisheng Zhang Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2q.dtsi | 80 ++++++++++++++++++++++++++++------------- 1 file changed, 56 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 52c7d644e492..8128c2b5ac07 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -6,6 +6,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include "skeleton.dtsi" @@ -47,28 +48,16 @@ }; }; - smclk: sysmgr-clock { + refclk: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - cfgclk: config-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - cpuclk: cpu-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1200000000>; - }; - twdclk: twdclk { compatible = "fixed-factor-clock"; #clock-cells = <0>; - clocks = <&cpuclk>; + clocks = <&cpupll>; clock-mult = <1>; clock-div = <3>; }; @@ -106,6 +95,13 @@ #interrupt-cells = <3>; }; + cpupll: cpupll@dd0170 { + compatible = "marvell,berlin2q-pll"; + clocks = <&refclk>; + #clock-cells = <0>; + reg = <0xdd0170 0x8>; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>; @@ -189,7 +185,7 @@ timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; interrupts = <8>; }; @@ -197,7 +193,7 @@ timer1: timer@2c14 { compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -205,7 +201,7 @@ timer2: timer@2c28 { compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -213,7 +209,7 @@ timer3: timer@2c3c { compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -221,7 +217,7 @@ timer4: timer@2c50 { compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -229,7 +225,7 @@ timer5: timer@2c64 { compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -237,7 +233,7 @@ timer6: timer@2c78 { compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -245,7 +241,7 @@ timer7: timer@2c8c { compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; - clocks = <&cfgclk>; + clocks = <&coreclk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -290,11 +286,47 @@ }; }; + syspll: syspll@ea0030 { + compatible = "marvell,berlin2q-pll"; + clocks = <&refclk>; + #clock-cells = <0>; + reg = <0xea0030 0x8>; + }; + + coreclk: core-clock@ea00e8 { + compatible = "marvell,berlin2q-core-clocks"; + #clock-cells = <1>; + reg = <0xea00e8 0x18>; + clocks = <&refclk>, <&syspll>; + clock-names = "refclk", "syspll"; + clock-output-names = "sys", "drmfigo", "cfg", + "gfx2d", "zsp", "perif", "pcube", "vscope", + "nfc_ecc", "vpp", "app", "gfx2daxi", "geth0", + "ahbapb", "usb0", "usb1", "usb2", "usb3", + "pbridge", "sdio", "nfc", "smemc", "pcie"; + }; + generic-regs@ea0110 { compatible = "marvell,berlin-generic-regs", "syscon"; reg = <0xea0110 0x10>; }; + sdio0xin_clk: sdio0xinclk@ea0158 { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea0158 0x4>; + clocks = <&syspll>; + clock-names = "mux_bypass"; + }; + + sdio1xin_clk: sdio1xinclk@ea015c { + compatible = "marvell,berlin2-clk-div"; + #clock-cells = <0>; + reg = <0xea015c 0x4>; + clocks = <&syspll>; + clock-names = "mux_bypass"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; @@ -308,7 +340,7 @@ reg = <0x9000 0x100>; interrupt-parent = <&sic>; interrupts = <8>; - clocks = <&smclk>; + clocks = <&refclk>; reg-shift = <2>; status = "disabled"; }; @@ -318,7 +350,7 @@ reg = <0xa000 0x100>; interrupt-parent = <&sic>; interrupts = <9>; - clocks = <&smclk>; + clocks = <&refclk>; reg-shift = <2>; status = "disabled"; };