From patchwork Thu May 15 00:32:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 4178791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EE718BFF02 for ; Thu, 15 May 2014 00:36:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E42EE202EB for ; Thu, 15 May 2014 00:36:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E197920328 for ; Thu, 15 May 2014 00:36:21 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WkjcD-0005CN-DY; Thu, 15 May 2014 00:33:41 +0000 Received: from mail-pa0-f73.google.com ([209.85.220.73]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wkjc4-00056h-5U for linux-arm-kernel@lists.infradead.org; Thu, 15 May 2014 00:33:32 +0000 Received: by mail-pa0-f73.google.com with SMTP id lj1so80597pab.2 for ; Wed, 14 May 2014 17:33:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YcE2ck7IzWYpAhOFnTazpCsXAZy+phEWsY4ah79/TOk=; b=kWtuuJ0Kr+AL56m6cLYZqDEbn6BlkINwrbvHLqjuzgLH+U6MdUb+i6cO6jUWqGPW1g NtzKgWAtAPLMysHwY1iFxnQ2AtoThvmog2VIJRUpQY8lQhMr72CwjGKB4ZCxD9Xq5bEN BnBQgXvae3628MWJJr6GnGg70QL37QtxXSVhUrENoP9vw2qly3WwduO3MHapLJSBJWQB 5FDCljqzA5k3ECdU+KH5BjGkI7cQGGhIQYN47vlbyQr0jstxgz1BfrsSNO1LNKzVQW5i c/r4+MG/1fz1kLKAce5xMVq6b5JkTNXreZVg4GZO+S1fpzCUBi6Xg1Iw1CJOGT+DMcTJ 01dQ== X-Gm-Message-State: ALoCoQmxcMW9t7Y1dAPaaVX4aiMCqu3qcdydqspgwujo/wRzqRvCmBMRdlPu5qSiJJDDGs5zpCGa X-Received: by 10.66.173.75 with SMTP id bi11mr3792789pac.4.1400113993621; Wed, 14 May 2014 17:33:13 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id l7si167899yho.1.2014.05.14.17.33.13 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 May 2014 17:33:13 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 490725A41E5; Wed, 14 May 2014 17:33:13 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 0D8372206A7; Wed, 14 May 2014 17:33:13 -0700 (PDT) From: Andrew Bresticker To: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org Subject: [RFC PATCH 03/10] clk: tegra: Fix xusb_hs_src clock hierarchy Date: Wed, 14 May 2014 17:32:59 -0700 Message-Id: <1400113986-339-4-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a In-Reply-To: <1400113986-339-1-git-send-email-abrestic@chromium.org> References: <1400113986-339-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140514_173332_242487_A6B4E04B X-CRM114-Status: GOOD ( 14.04 ) X-Spam-Score: -1.4 (-) Cc: Mark Rutland , Prashant Gaikwad , Russell King , Mathias Nyman , Pawel Moll , Stephen Warren , Andrew Bresticker , Greg Kroah-Hartman , Peter De Schrijver , Ian Campbell , Kishon Vijay Abraham I , Rob Herring , Thierry Reding , Randy Dunlap , Kumar Gala , Grant Likely , Mike Turquette X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the Tegra1x4 clock init code hard-codes the mux setting for xusb_hs_src and treats it as a fixed-factor clock. It is, however, a mux which can be parented by either xusb_ss_src/2 or pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an entry in periph_clks[] for the xusb_hs_src mux. Signed-off-by: Andrew Bresticker --- drivers/clk/tegra/clk-id.h | 1 + drivers/clk/tegra/clk-tegra-periph.c | 6 ++++++ drivers/clk/tegra/clk-tegra114.c | 15 +++++---------- drivers/clk/tegra/clk-tegra124.c | 15 +++++---------- include/dt-bindings/clock/tegra114-car.h | 3 ++- include/dt-bindings/clock/tegra124-car.h | 3 ++- 6 files changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h index c39613c..0011d54 100644 --- a/drivers/clk/tegra/clk-id.h +++ b/drivers/clk/tegra/clk-id.h @@ -233,6 +233,7 @@ enum clk_id { tegra_clk_xusb_hs_src, tegra_clk_xusb_ss, tegra_clk_xusb_ss_src, + tegra_clk_xusb_ss_div2, tegra_clk_max, }; diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c index a4063bc..adf6b81 100644 --- a/drivers/clk/tegra/clk-tegra-periph.c +++ b/drivers/clk/tegra/clk-tegra-periph.c @@ -340,6 +340,11 @@ static u32 mux_clkm_pllre_clk32_480M_pllc_ref_idx[] = { [0] = 0, [1] = 1, [2] = 3, [3] = 3, [4] = 4, [5] = 7, }; +static const char *mux_ss_60M[] = { + "xusb_ss_div2", "pll_u_60M" +}; +#define mux_ss_60M_idx NULL + static const char *mux_d_audio_clk[] = { "pll_a_out0", "pll_p", "clk_m", "spdif_in_sync", "i2s0_sync", "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync", @@ -501,6 +506,7 @@ static struct tegra_periph_init_data periph_clks[] = { XUSB("xusb_falcon_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_falcon_src), XUSB("xusb_fs_src", mux_clkm_48M_pllp_480M, CLK_SOURCE_XUSB_FS_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_fs_src), XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M_pllc_ref, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_ss_src), + NODIV("xusb_hs_src", mux_ss_60M, CLK_SOURCE_XUSB_SS_SRC, 25, MASK(1), 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_hs_src, NULL), XUSB("xusb_dev_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_dev_src), }; diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index 80431f0..841f54f 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -142,7 +142,6 @@ #define UTMIPLL_HW_PWRDN_CFG0_IDDQ_SWCTL BIT(0) #define CLK_SOURCE_CSITE 0x1d4 -#define CLK_SOURCE_XUSB_SS_SRC 0x610 #define CLK_SOURCE_EMC 0x19c /* PLLM override registers */ @@ -834,6 +833,7 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = { [tegra_clk_xusb_falcon_src] = { .dt_id = TEGRA114_CLK_XUSB_FALCON_SRC, .present = true }, [tegra_clk_xusb_fs_src] = { .dt_id = TEGRA114_CLK_XUSB_FS_SRC, .present = true }, [tegra_clk_xusb_ss_src] = { .dt_id = TEGRA114_CLK_XUSB_SS_SRC, .present = true }, + [tegra_clk_xusb_ss_div2] = { .dt_id = TEGRA114_CLK_XUSB_SS_DIV2, .present = true}, [tegra_clk_xusb_dev_src] = { .dt_id = TEGRA114_CLK_XUSB_DEV_SRC, .present = true }, [tegra_clk_xusb_dev] = { .dt_id = TEGRA114_CLK_XUSB_DEV, .present = true }, [tegra_clk_xusb_hs_src] = { .dt_id = TEGRA114_CLK_XUSB_HS_SRC, .present = true }, @@ -1182,16 +1182,11 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base) { struct clk *clk; - u32 val; - - /* xusb_hs_src */ - val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC); - val |= BIT(25); /* always select PLLU_60M */ - writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC); - clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0, - 1, 1); - clks[TEGRA114_CLK_XUSB_HS_SRC] = clk; + /* xusb_ss_div2 */ + clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0, + 1, 2); + clks[TEGRA114_CLK_XUSB_SS_DIV2] = clk; /* dsia mux */ clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0, diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 166e02f..6cabc3d 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -30,7 +30,6 @@ #define CLK_SOURCE_CSITE 0x1d4 #define CLK_SOURCE_EMC 0x19c -#define CLK_SOURCE_XUSB_SS_SRC 0x610 #define PLLC_BASE 0x80 #define PLLC_OUT 0x84 @@ -927,6 +926,7 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = { [tegra_clk_xusb_falcon_src] = { .dt_id = TEGRA124_CLK_XUSB_FALCON_SRC, .present = true }, [tegra_clk_xusb_fs_src] = { .dt_id = TEGRA124_CLK_XUSB_FS_SRC, .present = true }, [tegra_clk_xusb_ss_src] = { .dt_id = TEGRA124_CLK_XUSB_SS_SRC, .present = true }, + [tegra_clk_xusb_ss_div2] = { .dt_id = TEGRA124_CLK_XUSB_SS_DIV2, .present = true }, [tegra_clk_xusb_dev_src] = { .dt_id = TEGRA124_CLK_XUSB_DEV_SRC, .present = true }, [tegra_clk_xusb_dev] = { .dt_id = TEGRA124_CLK_XUSB_DEV, .present = true }, [tegra_clk_xusb_hs_src] = { .dt_id = TEGRA124_CLK_XUSB_HS_SRC, .present = true }, @@ -1108,16 +1108,11 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base) { struct clk *clk; - u32 val; - - /* xusb_hs_src */ - val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC); - val |= BIT(25); /* always select PLLU_60M */ - writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC); - clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0, - 1, 1); - clks[TEGRA124_CLK_XUSB_HS_SRC] = clk; + /* xusb_ss_div2 */ + clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0, + 1, 2); + clks[TEGRA124_CLK_XUSB_SS_DIV2] = clk; /* dsia mux */ clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0, diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h index 6d0d8d8..fc12621 100644 --- a/include/dt-bindings/clock/tegra114-car.h +++ b/include/dt-bindings/clock/tegra114-car.h @@ -337,6 +337,7 @@ #define TEGRA114_CLK_CLK_OUT_3_MUX 308 #define TEGRA114_CLK_DSIA_MUX 309 #define TEGRA114_CLK_DSIB_MUX 310 -#define TEGRA114_CLK_CLK_MAX 311 +#define TEGRA114_CLK_XUSB_SS_DIV2 311 +#define TEGRA114_CLK_CLK_MAX 312 #endif /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */ diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h index 8c1603b..159fd44 100644 --- a/include/dt-bindings/clock/tegra124-car.h +++ b/include/dt-bindings/clock/tegra124-car.h @@ -336,6 +336,7 @@ #define TEGRA124_CLK_DSIA_MUX 309 #define TEGRA124_CLK_DSIB_MUX 310 #define TEGRA124_CLK_SOR0_LVDS 311 -#define TEGRA124_CLK_CLK_MAX 312 +#define TEGRA124_CLK_XUSB_SS_DIV2 312 +#define TEGRA124_CLK_CLK_MAX 313 #endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */