From patchwork Tue May 20 08:45:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 4207931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 81BFEBEEAB for ; Tue, 20 May 2014 08:49:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8ECAB20364 for ; Tue, 20 May 2014 08:49:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 877BE201BF for ; Tue, 20 May 2014 08:49:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmfhC-0003yI-7S; Tue, 20 May 2014 08:46:50 +0000 Received: from mail-bn1blp0189.outbound.protection.outlook.com ([207.46.163.189] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wmfgk-0003hw-Fg for linux-arm-kernel@lists.infradead.org; Tue, 20 May 2014 08:46:24 +0000 Received: from BLUPR03MB344.namprd03.prod.outlook.com (10.141.48.24) by BLUPR03MB488.namprd03.prod.outlook.com (10.141.79.28) with Microsoft SMTP Server (TLS) id 15.0.944.11; Tue, 20 May 2014 08:46:04 +0000 Received: from BLUPR03CA035.namprd03.prod.outlook.com (10.141.30.28) by BLUPR03MB344.namprd03.prod.outlook.com (10.141.48.24) with Microsoft SMTP Server (TLS) id 15.0.944.11; Tue, 20 May 2014 08:46:03 +0000 Received: from BN1BFFO11FD033.protection.gbl (2a01:111:f400:7c10::1:165) by BLUPR03CA035.outlook.office365.com (2a01:111:e400:879::28) with Microsoft SMTP Server (TLS) id 15.0.949.11 via Frontend Transport; Tue, 20 May 2014 08:46:02 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD033.mail.protection.outlook.com (10.58.144.96) with Microsoft SMTP Server (TLS) id 15.0.949.9 via Frontend Transport; Tue, 20 May 2014 08:46:02 +0000 Received: from dragon.ap.freescale.net ([10.192.185.75]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s4K8je4w027018; Tue, 20 May 2014 01:45:59 -0700 From: Shawn Guo To: Subject: [PATCH 08/20] ARM: imx5: tzic_init_irq() can directly be .init_irq hook Date: Tue, 20 May 2014 16:45:26 +0800 Message-ID: <1400575538-21136-9-git-send-email-shawn.guo@freescale.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400575538-21136-1-git-send-email-shawn.guo@freescale.com> References: <1400575538-21136-1-git-send-email-shawn.guo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(4396001)(81342001)(74662001)(46102001)(86362001)(50226001)(47776003)(74502001)(50986999)(76176999)(6806004)(77096999)(92566001)(80022001)(79102001)(93916002)(81542001)(31966008)(85852003)(20776003)(64706001)(99396002)(48376002)(575784001)(83072002)(50466002)(102836001)(33646001)(62966002)(44976005)(21056001)(77982001)(77156001)(89996001)(76482001)(87286001)(19580405001)(92726001)(36756003)(69596002)(88136002)(19580395003)(84676001)(83322001)(97736001)(68736004)(87936001)(81156002); DIR:OUT; SFP:; SCL:1; SRVR:BLUPR03MB344; H:az84smr01.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 02176E2458 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Shawn.Guo@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140520_014622_732911_40D3818D X-CRM114-Status: UNSURE ( 9.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: Shawn Guo , Alexander Shiyan , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 4 +--- arch/arm/mach-imx/mach-imx50.c | 2 +- arch/arm/mach-imx/mach-imx51.c | 2 +- arch/arm/mach-imx/mach-imx53.c | 2 +- arch/arm/mach-imx/mm-imx5.c | 17 ----------------- arch/arm/mach-imx/tzic.c | 9 ++++++--- 6 files changed, 10 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index cf9e9c2..6d018c0 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -37,15 +37,13 @@ void imx35_init_early(void); void imx51_init_early(void); void imx53_init_early(void); void mxc_init_irq(void __iomem *); -void tzic_init_irq(void __iomem *); +void tzic_init_irq(void); void mx1_init_irq(void); void mx21_init_irq(void); void mx25_init_irq(void); void mx27_init_irq(void); void mx31_init_irq(void); void mx35_init_irq(void); -void mx51_init_irq(void); -void mx53_init_irq(void); void imx1_soc_init(void); void imx21_soc_init(void); void imx25_soc_init(void); diff --git a/arch/arm/mach-imx/mach-imx50.c b/arch/arm/mach-imx/mach-imx50.c index b899c0b..66e537b 100644 --- a/arch/arm/mach-imx/mach-imx50.c +++ b/arch/arm/mach-imx/mach-imx50.c @@ -30,7 +30,7 @@ static const char *imx50_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX50_DT, "Freescale i.MX50 (Device Tree Support)") .map_io = mx53_map_io, - .init_irq = mx53_init_irq, + .init_irq = tzic_init_irq, .init_machine = imx50_dt_init, .dt_compat = imx50_dt_board_compat, .restart = mxc_restart, diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index b8cd968..a849d43 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -37,7 +37,7 @@ static const char *imx51_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") .map_io = mx51_map_io, .init_early = imx51_init_early, - .init_irq = mx51_init_irq, + .init_irq = tzic_init_irq, .init_machine = imx51_dt_init, .init_late = imx51_init_late, .dt_compat = imx51_dt_board_compat, diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 2bad387..9a066af 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -39,7 +39,7 @@ static const char *imx53_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") .map_io = mx53_map_io, .init_early = imx53_init_early, - .init_irq = mx53_init_irq, + .init_irq = tzic_init_irq, .init_machine = imx53_dt_init, .init_late = imx53_init_late, .dt_compat = imx53_dt_board_compat, diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index 4c11202..d5dbf80 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -93,23 +93,6 @@ void __init imx53_init_early(void) imx_src_init(); } -void __init mx51_init_irq(void) -{ - tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); -} - -void __init mx53_init_irq(void) -{ - struct device_node *np; - void __iomem *base; - - np = of_find_compatible_node(NULL, NULL, "fsl,imx53-tzic"); - base = of_iomap(np, 0); - WARN_ON(!base); - - tzic_init_irq(base); -} - static struct sdma_platform_data imx51_sdma_pdata __initdata = { .fw_name = "sdma-imx51.bin", }; diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c index 7828af4..1d4f384 100644 --- a/arch/arm/mach-imx/tzic.c +++ b/arch/arm/mach-imx/tzic.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -153,13 +154,16 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) * interrupts. It registers the interrupt enable and disable functions * to the kernel for each interrupt source. */ -void __init tzic_init_irq(void __iomem *irqbase) +void __init tzic_init_irq(void) { struct device_node *np; int irq_base; int i; - tzic_base = irqbase; + np = of_find_compatible_node(NULL, NULL, "fsl,tzic"); + tzic_base = of_iomap(np, 0); + WARN_ON(!tzic_base); + /* put the TZIC into the reset value with * all interrupts disabled */ @@ -181,7 +185,6 @@ void __init tzic_init_irq(void __iomem *irqbase) irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id()); WARN_ON(irq_base < 0); - np = of_find_compatible_node(NULL, NULL, "fsl,tzic"); domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0, &irq_domain_simple_ops, NULL); WARN_ON(!domain);