From patchwork Tue May 20 21:09:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 4212981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 15EC09F32A for ; Tue, 20 May 2014 21:13:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B22020353 for ; Tue, 20 May 2014 21:13:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A51320320 for ; Tue, 20 May 2014 21:13:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmrIs-0004O9-B8; Tue, 20 May 2014 21:10:30 +0000 Received: from mail-ob0-x22c.google.com ([2607:f8b0:4003:c01::22c]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmrId-0003DG-CZ for linux-arm-kernel@lists.infradead.org; Tue, 20 May 2014 21:10:16 +0000 Received: by mail-ob0-f172.google.com with SMTP id wp18so1171721obc.3 for ; Tue, 20 May 2014 14:09:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JQ0tNilWZFO9M/RgaZS2tBAgDpjBSdhyQAvcv230LiY=; b=K/olw4aVk/imAYVM6YZzQtl2vSUeB5GMNuRAzXpdXJDej9dda/MgSFb9Y7QJI6QtHK RYXJAfXmAVRaYvJdLh0FqsHgku9UHKAKHqp6awUwK4c75AKQ57p4h4r4hi8Dr64Xe+10 XPCrH5qNzpq6yPpWGk6emxvDBFFs1CzW4ybxjfybMKz6BPgmZr/nVToBpGiyRzVoVJs6 iMWcfhe8qSHYGsdMiZb0SYoZcytqQbqQ6pTfKw3S64mmuCDzuc5iv/KSTNIhbqupb1c1 uadjhPTq/H77D7X8t2GX1VWJ9+zCaG1i4jG1mvmrn+BGjVGSCOmrnsx5ntFUop82jkrC Em7A== X-Received: by 10.60.76.166 with SMTP id l6mr5936340oew.83.1400620193260; Tue, 20 May 2014 14:09:53 -0700 (PDT) Received: from localhost.localdomain (66-90-144-10.dyn.grandenetworks.net. [66.90.144.10]) by mx.google.com with ESMTPSA id qp6sm39817593obb.14.2014.05.20.14.09.52 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 May 2014 14:09:52 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 03/10] irqchip: versatile-fpga: add pass-thru enable support Date: Tue, 20 May 2014 16:09:29 -0500 Message-Id: <1400620176-7239-4-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400620176-7239-1-git-send-email-robherring2@gmail.com> References: <1400620176-7239-1-git-send-email-robherring2@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140520_141015_485298_85F3821E X-CRM114-Status: GOOD ( 10.69 ) X-Spam-Score: 0.1 (/) Cc: Rob Herring , linus.walleij@linaro.org, arm@kernel.org, Thomas Gleixner , Jason Cooper X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Herring Set the PIC_ENABLES register when the passthru-mask property is present. This enables interrupts on the secondary controller to be passed thru directly to the primary controller. Signed-off-by: Rob Herring Cc: Thomas Gleixner Cc: Jason Cooper Acked-by: Jason Cooper --- drivers/irqchip/irq-versatile-fpga.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c index 3ae2bb8..328440b 100644 --- a/drivers/irqchip/irq-versatile-fpga.c +++ b/drivers/irqchip/irq-versatile-fpga.c @@ -26,6 +26,8 @@ #define FIQ_ENABLE_SET 0x28 #define FIQ_ENABLE_CLEAR 0x2C +#define PIC_ENABLES 0x20 /* set interrupt pass through bits */ + /** * struct fpga_irq_data - irq data container for the FPGA IRQ controller * @base: memory offset in virtual memory @@ -185,6 +187,7 @@ int __init fpga_irq_of_init(struct device_node *node, void __iomem *base; u32 clear_mask; u32 valid_mask; + u32 passthru_mask; int parent_irq; if (WARN_ON(!node)) @@ -209,6 +212,9 @@ int __init fpga_irq_of_init(struct device_node *node, writel(clear_mask, base + IRQ_ENABLE_CLEAR); writel(clear_mask, base + FIQ_ENABLE_CLEAR); + if (!of_property_read_u32(node, "passthru-mask", &passthru_mask)) + writel(passthru_mask, base + PIC_ENABLES); + return 0; } #endif