From patchwork Wed May 21 00:56:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 4213551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B4FC89F23C for ; Wed, 21 May 2014 02:18:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E95082037A for ; Wed, 21 May 2014 02:18:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1620720364 for ; Wed, 21 May 2014 02:18:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wmw3o-0005lM-VH; Wed, 21 May 2014 02:15:16 +0000 Received: from mail-bn1blp0186.outbound.protection.outlook.com ([207.46.163.186] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wmw3l-0004eP-UP for linux-arm-kernel@lists.infradead.org; Wed, 21 May 2014 02:15:15 +0000 Received: from BLUPR03CA031.namprd03.prod.outlook.com (10.141.30.24) by BLUPR03MB422.namprd03.prod.outlook.com (10.141.78.143) with Microsoft SMTP Server (TLS) id 15.0.944.11; Wed, 21 May 2014 02:14:51 +0000 Received: from BL2FFO11FD005.protection.gbl (2a01:111:e400:7c09:9c8e:99ff:fe19:e0a6) by BLUPR03CA031.outlook.office365.com (2a01:111:e400:879::24) with Microsoft SMTP Server (TLS) id 15.0.949.11 via Frontend Transport; Wed, 21 May 2014 02:14:51 +0000 Received: from az84smr01.freescale.net (192.88.158.246) by BL2FFO11FD005.mail.protection.outlook.com (10.173.161.1) with Microsoft SMTP Server (TLS) id 15.0.949.9 via Frontend Transport; Wed, 21 May 2014 02:14:50 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s4L2EkwB001618; Tue, 20 May 2014 19:14:47 -0700 From: Huang Shijie To: Subject: [PATCH 1/2 bugfix] serial: imx: reset the uart port all the time Date: Wed, 21 May 2014 08:56:28 +0800 Message-ID: <1400633789-31979-1-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.8 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.246; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(199002)(189002)(20776003)(4396001)(93916002)(50986999)(19580395003)(92726001)(85852003)(87286001)(83322001)(50226001)(33646001)(92566001)(79102001)(50466002)(77096999)(48376002)(44976005)(6806004)(87936001)(36756003)(64706001)(89996001)(88136002)(83072002)(31966008)(77982001)(99396002)(47776003)(19580405001)(74502001)(81542001)(77156001)(62966002)(102836001)(76482001)(80022001)(74662001)(46102001)(21056001)(81342001)(42262001); DIR:OUT; SFP:; SCL:1; SRVR:BLUPR03MB422; H:az84smr01.freescale.net; FPR:; MLV:sfv; PTR:gate-az5.freescale.com; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0218A015FA Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.246 as permitted sender) receiver=; client-ip=192.88.158.246; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.246) smtp.mailfrom=shijie.huang@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140520_191514_162411_4F4824C3 X-CRM114-Status: GOOD ( 10.74 ) X-Spam-Score: -0.0 (/) Cc: Huang Shijie , linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Current code resets the uart port only when it supports the irda mode. In actually, we also need to reset the uart port in the non-irda mode. A hang was caught in the following case: UART A transmits data to the other end. But the transmission maybe terminated. In some corner case, the TX FIFO maybe not empty. The kernel will hang at the imx_set_termios(): ............................................................ while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) barrier(); ............................................................ This patch resets the uart port all the time in the imx_startup(). And fix the hang. Signed-off-by: Huang Shijie --- drivers/tty/serial/imx.c | 22 ++++++++++------------ 1 files changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 3b6c1a2..64901d0 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1070,7 +1070,7 @@ static void imx_disable_dma(struct imx_port *sport) static int imx_startup(struct uart_port *port) { struct imx_port *sport = (struct imx_port *)port; - int retval; + int retval, i; unsigned long flags, temp; retval = clk_prepare_enable(sport->clk_per); @@ -1098,17 +1098,15 @@ static int imx_startup(struct uart_port *port) writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); - if (USE_IRDA(sport)) { - /* reset fifo's and state machines */ - int i = 100; - temp = readl(sport->port.membase + UCR2); - temp &= ~UCR2_SRST; - writel(temp, sport->port.membase + UCR2); - while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && - (--i > 0)) { - udelay(1); - } - } + /* Reset fifo's and state machines */ + i = 100; + + temp = readl(sport->port.membase + UCR2); + temp &= ~UCR2_SRST; + writel(temp, sport->port.membase + UCR2); + + while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) + udelay(1); /* * Allocate the IRQ(s) i.MX1 has three interrupts whereas later