From patchwork Thu May 22 16:44:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 4224661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 60F309F23C for ; Thu, 22 May 2014 16:49:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 75ABB2037A for ; Thu, 22 May 2014 16:49:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AC9182034B for ; Thu, 22 May 2014 16:49:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WnW9K-0001HW-1Y; Thu, 22 May 2014 16:47:22 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WnW8A-0000e8-9V for linux-arm-kernel@lists.infradead.org; Thu, 22 May 2014 16:46:10 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s4MGjCRP002167; Thu, 22 May 2014 11:45:12 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4MGjCV5001265; Thu, 22 May 2014 11:45:12 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Thu, 22 May 2014 11:45:12 -0500 Received: from khorivan.synapse.com (incasgf5a_e1_2.itg.ti.com [10.167.216.36]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4MGiUs8026763; Thu, 22 May 2014 11:45:06 -0500 From: Ivan Khoronzhuk To: , , , , , , , , , , Subject: [Patch v6 6/7] ARM: dts: keystone: update reset node to work with reset driver Date: Thu, 22 May 2014 19:44:21 +0300 Message-ID: <1400777062-19276-7-git-send-email-ivan.khoronzhuk@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400777062-19276-1-git-send-email-ivan.khoronzhuk@ti.com> References: <1400777062-19276-1-git-send-email-ivan.khoronzhuk@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140522_094610_429499_8A0EF9A1 X-CRM114-Status: UNSURE ( 9.03 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.7 (-----) Cc: devicetree@vger.kernel.org, grygorii.strashko@ti.com, linux@arm.linux.org.uk, sergei.shtylyov@cogentembedded.com, linux-doc@vger.kernel.org, w-kwok2@ti.com, rdunlap@infradead.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, m-karicheri2@ti.com, olof@lixom.net, Ivan Khoronzhuk , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pll controller register set and device state control registers include sets of registers with different purposes, so it's logically to add syscon entry to be able to access them from appropriate places. So added pll controller and device state control syscon entries. The keystone driver requires the next additional properties: "ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to access pll controller registers and the offset to use reset control registers. "ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to access device state control registers and the offset in order to use mux block registers for all watchdogs. "ti,wdt_list" - option to declare what watchdogs are used to reboot the SoC, so set "0" WDT as default. Reviewed-by: Arnd Bergmann Signed-off-by: Ivan Khoronzhuk --- arch/arm/boot/dts/keystone.dtsi | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index d9f99e7..b05def6 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -66,9 +66,21 @@ ranges = <0x0 0x0 0x0 0xc0000000>; dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; + pllctrl: pll-controller@02310000 { + compatible = "ti,keystone-pllctrl", "syscon"; + reg = <0x02310000 0x200>; + }; + + devctrl: device-state-control@02620000 { + compatible = "ti,keystone-devctrl", "syscon"; + reg = <0x02620000 0x1000>; + }; + rstctrl: reset-controller { compatible = "ti,keystone-reset"; - reg = <0x023100e8 4>; /* pll reset control reg */ + ti,syscon-pll = <&pllctrl 0xe4>; + ti,syscon-dev = <&devctrl 0x328>; + ti,wdt_list = <0>; }; /include/ "keystone-clocks.dtsi"