diff mbox

[03/22] clk: sunxi: add "pll6" to sun6i protected clock list

Message ID 1400831485-28576-4-git-send-email-wens@csie.org
State New, archived
Headers show

Commit Message

Chen-Yu Tsai May 23, 2014, 7:51 a.m. UTC
PLL6 is used by some important but undocumented module, most likely
memory related, such as mbus or the actual memory controller. As we
do not have a driver for that, add pll6 to the list of protected
clocks, so that it won't be disabled and leave us with a non-responsive
system.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi/clk-sunxi.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Maxime Ripard May 25, 2014, 6:48 p.m. UTC | #1
On Fri, May 23, 2014 at 03:51:06PM +0800, Chen-Yu Tsai wrote:
> PLL6 is used by some important but undocumented module, most likely
> memory related, such as mbus or the actual memory controller. As we
> do not have a driver for that, add pll6 to the list of protected
> clocks, so that it won't be disabled and leave us with a non-responsive
> system.

What issue have you seen?

The system actually works pretty great on the A31.

Maxime
Chen-Yu Tsai May 26, 2014, 4:47 a.m. UTC | #2
On Mon, May 26, 2014 at 2:48 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Fri, May 23, 2014 at 03:51:06PM +0800, Chen-Yu Tsai wrote:
>> PLL6 is used by some important but undocumented module, most likely
>> memory related, such as mbus or the actual memory controller. As we
>> do not have a driver for that, add pll6 to the list of protected
>> clocks, so that it won't be disabled and leave us with a non-responsive
>> system.
>
> What issue have you seen?

Completely unresponsive after PLL6 is gated (on the A23).

> The system actually works pretty great on the A31.

Does it work when there aren't any other PLL6 consumers?
Maybe the boot0 on A31 and A23 setup some DRAM-related modules differently.

If the A31 works without protecting PLL6, I'll add a separate list
for the A23.


Thanks,
ChenYu
Maxime Ripard May 27, 2014, 8:32 a.m. UTC | #3
On Mon, May 26, 2014 at 12:47:30PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 26, 2014 at 2:48 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > On Fri, May 23, 2014 at 03:51:06PM +0800, Chen-Yu Tsai wrote:
> >> PLL6 is used by some important but undocumented module, most likely
> >> memory related, such as mbus or the actual memory controller. As we
> >> do not have a driver for that, add pll6 to the list of protected
> >> clocks, so that it won't be disabled and leave us with a non-responsive
> >> system.
> >
> > What issue have you seen?
> 
> Completely unresponsive after PLL6 is gated (on the A23).
> 
> > The system actually works pretty great on the A31.
> 
> Does it work when there aren't any other PLL6 consumers?

Yes.

> Maybe the boot0 on A31 and A23 setup some DRAM-related modules differently.
> 
> If the A31 works without protecting PLL6, I'll add a separate list
> for the A23.

Thanks!
Maxime
diff mbox

Patch

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index e0e24d5..3e33bc1 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -1229,6 +1229,7 @@  CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks);
 
 static const char *sun6i_critical_clocks[] __initdata = {
 	"cpu",
+	"pll6", /* something we don't know about uses pll6 */
 	"ahb1_sdram",
 };