@@ -787,6 +787,30 @@
status = "disabled";
};
+ sata@0,70020000 {
+ compatible = "nvidia,tegra124-ahci";
+
+ reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
+ <0x0 0x70020000 0x0 0x7000>; /* SATA */
+
+ interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&tegra_car TEGRA124_CLK_SATA>,
+ <&tegra_car TEGRA124_CLK_SATA_OOB>,
+ <&tegra_car TEGRA124_CLK_CML1>,
+ <&tegra_car TEGRA124_CLK_PLL_E>;
+
+ resets = <&tegra_car 124>,
+ <&tegra_car 123>,
+ <&tegra_car 129>;
+ reset-names = "sata", "sata-oob", "sata-cold";
+
+ phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
+ phy-names = "sata-phy";
+
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
This adds the integrated AHCI-compliant Serial ATA controller present in Tegra124 systems-on-chip to the Tegra124 device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Cc: devicetree@vger.kernel.org --- arch/arm/boot/dts/tegra124.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)