From patchwork Fri Jun 6 23:14:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 4313851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A12419F357 for ; Fri, 6 Jun 2014 23:18:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CEAAE201BA for ; Fri, 6 Jun 2014 23:18:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D81032018B for ; Fri, 6 Jun 2014 23:18:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wt3La-0006US-Ft; Fri, 06 Jun 2014 23:14:54 +0000 Received: from mail-ve0-f201.google.com ([209.85.128.201]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wt3LW-0006U4-Q7 for linux-arm-kernel@lists.infradead.org; Fri, 06 Jun 2014 23:14:51 +0000 Received: by mail-ve0-f201.google.com with SMTP id db11so688439veb.2 for ; Fri, 06 Jun 2014 16:14:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HStBR64F+bH3xf1XPRtApW8nFCOy0xui7CHl/j9iTCE=; b=NVMZJ/RhlfEduwBRpXWCOAcadJbYW8oxcyFL6AKUwKnAxZLcU02/SK9nc5K9yA/xRW ydGo8n8whiSqk8Cvn7LW8SUc0PO8urkERzvD/g8IZ9HRBcWrbjCLOMU+SueMvAb7k3f3 QJ8PsabJZwAJSrQRKOSXsSHMqIHgq1K0GszIPpgIsY18O3PvLkczKvEWjz9ZTnUdi8xW OyiMjGYwLnrjqpMm/svLomKqCKZY3Ztc/5K366Y/KRdW9j5FED9Q5tmVlspJiyfl5NEG 0g6hYnlTR9sb/zlLpNJHN22RurDYOAWZyqfXaJEMsx2HOA9v+UkUpzQRiDnsbZtA33lu EL4g== X-Gm-Message-State: ALoCoQkvxUBSDcauLOUsF373DZpG33Pg4tor3nuP2jCEbtGdDrmiGgdb/TwgnlvoJP/k1A6K3u9/ X-Received: by 10.58.238.7 with SMTP id vg7mr5437313vec.22.1402096469163; Fri, 06 Jun 2014 16:14:29 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id xn6si761016vdc.2.2014.06.06.16.14.29 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 06 Jun 2014 16:14:29 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.72.141]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id E2E985A4676; Fri, 6 Jun 2014 16:14:28 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id 83493810E0; Fri, 6 Jun 2014 16:14:28 -0700 (PDT) From: Doug Anderson To: Kukjin Kim , Nicolas Pitre Subject: [PATCH v2] ARM: EXYNOS: mcpm: Don't rely on firmware's secondary_cpu_start Date: Fri, 6 Jun 2014 16:14:25 -0700 Message-Id: <1402096465-13218-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1402090985-8061-1-git-send-email-dianders@chromium.org> References: <1402090985-8061-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140606_161450_918893_095CC76A X-CRM114-Status: GOOD ( 18.01 ) X-Spam-Score: -1.4 (-) Cc: Tushar Behera , linux@arm.linux.org.uk, Kevin Hilman , Andrew Bresticker , Inderpal Singh , Doug Anderson , linux-kernel@vger.kernel.org, olof@lixom.net, Thomas Abraham , linux-arm-kernel@lists.infradead.org, Abhilash Kesavan , Javier Martinez Canillas , linux-samsung-soc@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On exynos mcpm systems the firmware is hardcoded to jump to an address in SRAM (0x02073000) when secondary CPUs come up. By default the firmware puts a bunch of code at that location. That code expects the kernel to fill in a few slots with addresses that it uses to jump back to the kernel's entry point for secondary CPUs. Originally (on prerelease hardware) this firmware code contained a bunch of workarounds to deal with boot ROM bugs. However on all shipped hardware we simply use this code to redirect to a kernel function for bringing up the CPUs. Let's stop relying on the code provided by the bootloader and just plumb in our own (simple) code jump to the kernel. This has the nice benefit of fixing problems due to the fact that older bootloaders (like the one shipped on the Samsung Chromebook 2) might have put slightly different code into this location. Once suspend/resume is implemented for systems using exynos-mcpm we'll need to make sure we reinstall our fixed up code after resume. ...but that's not anything new since IRAM (and thus the address of the mcpm_entry_point) is lost across suspend/resume anyway. Signed-off-by: Doug Anderson Acked-by: Nicolas Pitre Acked-by: Kevin Hilman Tested-by: Kevin Hilman --- Changes in v2: - Removed #define arch/arm/mach-exynos/mcpm-exynos.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 0498d0b..ace0ed6 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -25,7 +25,6 @@ #define EXYNOS5420_CPUS_PER_CLUSTER 4 #define EXYNOS5420_NR_CLUSTERS 2 -#define MCPM_BOOT_ADDR_OFFSET 0x1c /* * The common v7_exit_coherency_flush API could not be used because of the @@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void) pr_info("Exynos MCPM support installed\n"); /* - * Future entries into the kernel can now go - * through the cluster entry vectors. + * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr + * as part of secondary_cpu_start(). Let's redirect it to the + * mcpm_entry_point(). */ - __raw_writel(virt_to_phys(mcpm_entry_point), - ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); + __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */ + __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */ + __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8); iounmap(ns_sram_base_addr);