From patchwork Wed Jun 11 15:30:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 4336901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4A4FBBEEAA for ; Wed, 11 Jun 2014 15:33:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 76B162022A for ; Wed, 11 Jun 2014 15:33:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7609320136 for ; Wed, 11 Jun 2014 15:33:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WukUl-00014l-CL; Wed, 11 Jun 2014 15:31:23 +0000 Received: from mailout4.w1.samsung.com ([210.118.77.14]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WukUL-0000nn-8f for linux-arm-kernel@lists.infradead.org; Wed, 11 Jun 2014 15:30:58 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N7000BOOGEQZW40@mailout4.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 11 Jun 2014 16:30:26 +0100 (BST) X-AuditID: cbfec7f4-b7fac6d000006cfe-64-53987618206e Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 33.C0.27902.81678935; Wed, 11 Jun 2014 16:30:33 +0100 (BST) Received: from AMDC1227.digital.local ([106.116.147.199]) by eusync1.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N7000CN5GES3Z00@eusync1.samsung.com>; Wed, 11 Jun 2014 16:30:32 +0100 (BST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Subject: [PATCH 4/5] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Date: Wed, 11 Jun 2014 17:30:11 +0200 Message-id: <1402500612-4778-5-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.9.3 In-reply-to: <1402500612-4778-1-git-send-email-t.figa@samsung.com> References: <1402500612-4778-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrJLMWRmVeSWpSXmKPExsVy+t/xy7qSZTOCDZYvYLTon9bBatG74Cqb xfbOGewWU/4sZ7LY9Pgaq8XlXXPYLGYv6WexmHF+H5PF7cu8Fq/71jBbrJ/xmsVi1a4/jBb7 r3g58Hq0NPeweXz7OonF43JfL5PHzll32T3uXNvD5rF5Sb1H35ZVjB53r79k8jh+YzuTx+dN cgFcUVw2Kak5mWWpRfp2CVwZb6Y9Yyy4KFbR/amDsYHxqFAXIyeHhICJRPf758wQtpjEhXvr 2boYuTiEBJYySkxquc8E4fQxSby++oQNpIpNQE3ic8MjMFtEQFXic9sCdpAiZoG9zBJnZtxg 7GLk4BAWCJY4vlsNxGQBqrnwMRWknFfAUeL477OMEMvkJHq3vQFbzCngJPH0ci9YXAioZtX6 i8wTGHkXMDKsYhRNLU0uKE5KzzXUK07MLS7NS9dLzs/dxAgJ3i87GBcfszrEKMDBqMTDy6Ez LViINbGsuDL3EKMEB7OSCG9B4YxgId6UxMqq1KL8+KLSnNTiQ4xMHJxSDYzzn5qoL3OZysQd vGzT/cx/D+12no8O57S28zq45XTRrM99gR+617KUW+aI/O9vdM96G3qGeese9S0zTzPcfb60 6t5PLzvtXBf2lCuWc32OfXmiZxI1Y7KAzLmKa7lbbxqvaWWa+JytvGfG6Ze/n0ht/7HoU/uc w1NXJ7gcX3Ts45lZK49tPFO9VImlOCPRUIu5qDgRAAmIg9w8AgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140611_083057_492493_80FC446A X-CRM114-Status: GOOD ( 11.78 ) X-Spam-Score: -5.7 (-----) Cc: Kukjin Kim , Laura Abbott , Tony Lindgren , Linus Walleij , linux-kernel@vger.kernel.org, Tomasz Figa , Santosh Shilimkar , Robin Holt , Russell King , linux-omap@vger.kernel.org, Tomasz Figa , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos4 SoCs equipped with an L2C-310 cache controller and running under secure firmware require certain registers of aforementioned IP to be accessed only from secure mode. This means that SMC calls are required for certain register writes. To handle this, an implementation of .write_sec callback is provided by this patch. Signed-off-by: Tomasz Figa --- arch/arm/mach-exynos/firmware.c | 61 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index eb91d23..34f7798 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -14,7 +14,9 @@ #include #include +#include #include +#include #include @@ -70,6 +72,55 @@ static const struct firmware_ops exynos_firmware_ops = { .cpu_boot = exynos_cpu_boot, }; +static void exynos_l2_write_sec(void __iomem *base, unsigned long val, + unsigned reg) +{ + switch (reg) { + case L2X0_CTRL: + exynos_smc(SMC_CMD_L2X0CTRL, val, 0, 0); + break; + + case L2X0_AUX_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP2, + readl_relaxed(base + L310_POWER_CTRL), + val, 0); + break; + + case L2X0_DEBUG_CTRL: + exynos_smc(SMC_CMD_L2X0DEBUG, val, 0, 0); + break; + + case L310_TAG_LATENCY_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + val, + readl_relaxed(base + L310_DATA_LATENCY_CTRL), + readl_relaxed(base + L310_PREFETCH_CTRL)); + break; + + case L310_DATA_LATENCY_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + readl_relaxed(base + L310_TAG_LATENCY_CTRL), + val, + readl_relaxed(base + L310_PREFETCH_CTRL)); + break; + + case L310_PREFETCH_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + readl_relaxed(base + L310_TAG_LATENCY_CTRL), + readl_relaxed(base + L310_DATA_LATENCY_CTRL), + val); + break; + + case L310_POWER_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP2, val, + readl_relaxed(base + L2X0_AUX_CTRL), 0); + break; + + default: + WARN_ONCE(1, "%s: ignoring write to reg 0x%x\n", __func__, reg); + } +} + void __init exynos_firmware_init(void) { struct device_node *nd; @@ -89,4 +140,14 @@ void __init exynos_firmware_init(void) pr_info("Running under secure firmware.\n"); register_firmware_ops(&exynos_firmware_ops); + + /* + * Exynos 4 SoCs (based on Cortex A9 and equipped with L2C-310), + * running under secure firmware, require certain registers of L2 + * cache controller to be written in secure mode. Here .write_sec + * callback is provided to perform necessary SMC calls. + */ + if (IS_ENABLED(CONFIG_CACHE_L2X0) + && read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) + outer_cache.write_sec = exynos_l2_write_sec; }