From patchwork Thu Jun 12 16:30:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 4343581 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1198F9F3B4 for ; Thu, 12 Jun 2014 16:36:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4BDF62020E for ; Thu, 12 Jun 2014 16:36:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82B7F20034 for ; Thu, 12 Jun 2014 16:36:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wv7wH-0000hU-Ib; Thu, 12 Jun 2014 16:33:21 +0000 Received: from mail-pb0-f41.google.com ([209.85.160.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wv7u8-0007sm-2l for linux-arm-kernel@lists.infradead.org; Thu, 12 Jun 2014 16:31:11 +0000 Received: by mail-pb0-f41.google.com with SMTP id ma3so1178068pbc.0 for ; Thu, 12 Jun 2014 09:30:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=svjelU8qKNlnOKiwvGTo8G0kKaK2E+677S8vq5TwQas=; b=HGGirjShKPZlHl7WGfVxh9ihPu4Jtjjyf4AeCEUyqGbK+usxG63Lle+eEG3W9BY7/T vuxNu58ZJr+qhx8ubBGHvsw4aRACrYiGl7CPtn0eI8Nr0jqSmTfqC8EKxP7k1Cv/GFLb 2T2nkFcUUOngfhGWImJF9GXtJwbJ9Adu97pOWZJ5e6Uv/ZV4RfSt016Mvb3TPWM9Qatb Vf+MxvNL7rbTbo1uaLiHq1ta6Rdp3VRFN4DL/uhcWqHRVDAiwsFflAMiEEVqOw7xDRz1 wCMKYJk/rUpGLNBA+W+tCz4MVyQlUAHIH5csfVmiTG3b1jtd+IyylWEcUlct8owgPbTz KBdA== X-Gm-Message-State: ALoCoQnosYqNmIFTU6lwISk0rLVJQAMwENgqeM5Q40rHAsXeat2hXusW992g6h+itGSBEuH4YsHM X-Received: by 10.66.141.109 with SMTP id rn13mr22688256pab.117.1402590647267; Thu, 12 Jun 2014 09:30:47 -0700 (PDT) Received: from kamensky-w530.cisco.com (128-107-239-235.cisco.com. [128.107.239.235]) by mx.google.com with ESMTPSA id nh8sm81278030pbc.25.2014.06.12.09.30.45 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Jun 2014 09:30:46 -0700 (PDT) From: Victor Kamensky To: kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, agraf@suse.de Subject: [PATCH v4 10/14] ARM64: KVM: store kvm_vcpu_fault_info est_el2 as word Date: Thu, 12 Jun 2014 09:30:09 -0700 Message-Id: <1402590613-3341-11-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1402590613-3341-1-git-send-email-victor.kamensky@linaro.org> References: <1402590613-3341-1-git-send-email-victor.kamensky@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140612_093108_220235_199DE8FC X-CRM114-Status: UNSURE ( 9.23 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: taras.kondratiuk@linaro.org, linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Victor Kamensky X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP esr_el2 field of struct kvm_vcpu_fault_info has u32 type. It should be stored as word. Current code works in LE case because existing puts least significant word of x1 into esr_el2, and it puts most significant work of x1 into next field, which accidentally is OK because it is updated again by next instruction. But existing code breaks in BE case. Signed-off-by: Victor Kamensky Acked-by: Christoffer Dall Acked-by: Marc Zyngier --- arch/arm64/kvm/hyp.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S index 2c56012..0620691 100644 --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -824,7 +824,7 @@ el1_trap: mrs x2, far_el2 2: mrs x0, tpidr_el2 - str x1, [x0, #VCPU_ESR_EL2] + str w1, [x0, #VCPU_ESR_EL2] str x2, [x0, #VCPU_FAR_EL2] str x3, [x0, #VCPU_HPFAR_EL2]