From patchwork Thu Jun 12 16:30:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 4343551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0EDA7BEEAA for ; Thu, 12 Jun 2014 16:35:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 489B12034C for ; Thu, 12 Jun 2014 16:35:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6B9CD202FF for ; Thu, 12 Jun 2014 16:35:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wv7vV-00007p-Rz; Thu, 12 Jun 2014 16:32:33 +0000 Received: from mail-pa0-f44.google.com ([209.85.220.44]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wv7u5-0007t8-Uo for linux-arm-kernel@lists.infradead.org; Thu, 12 Jun 2014 16:31:07 +0000 Received: by mail-pa0-f44.google.com with SMTP id bj1so1190641pad.3 for ; Thu, 12 Jun 2014 09:30:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gRo7G/nXZur8ItF9ZUCEB+YnDKhr4sLWoZLWouNT/8M=; b=WIDkR8ayg9x5/yS4IaiurP7xwGUq6rS4Od0XVXWpZyeH6kfFaQN71umt5ChkxNQnql LOJQ2MhQ2RU5RSfT1g+zp9TgkKVEnBqIybPYRIM0xV8LPrhPTdPNdIUp6fLJlbNc8Zk9 o4la/9jCFiwpG8tAVv8A2WTHAU76+ke17IpK7edq/PIGmcgnhthNv115joz28E7N7xoT 9tca6F6dk7CWKtYg75mvJwKYTPGPI9KAEmxF/wRnKl7CPa95T63VIMl4JOzsppOMOBvH lv4DiIRcqMSOiM1BXzmiR/wQGh7In730Z7IFDlmcsVnlTs/lAip9QF8FzpGgCYT3flN2 bJAg== X-Gm-Message-State: ALoCoQkZxx9yvpb5PoWjzbI+cZzDtgiNZFoDTDO7obCAo4eIX7cG30dRwXOpHfKWgmfq61g9CCDs X-Received: by 10.66.231.139 with SMTP id tg11mr22289696pac.87.1402590650460; Thu, 12 Jun 2014 09:30:50 -0700 (PDT) Received: from kamensky-w530.cisco.com (128-107-239-235.cisco.com. [128.107.239.235]) by mx.google.com with ESMTPSA id nh8sm81278030pbc.25.2014.06.12.09.30.48 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Jun 2014 09:30:49 -0700 (PDT) From: Victor Kamensky To: kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, agraf@suse.de Subject: [PATCH v4 12/14] ARM64: KVM: vgic_elrsr and vgic_eisr need to be byteswapped in BE case Date: Thu, 12 Jun 2014 09:30:11 -0700 Message-Id: <1402590613-3341-13-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1402590613-3341-1-git-send-email-victor.kamensky@linaro.org> References: <1402590613-3341-1-git-send-email-victor.kamensky@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140612_093106_059023_54140297 X-CRM114-Status: UNSURE ( 7.48 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: taras.kondratiuk@linaro.org, linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Victor Kamensky X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On arm64 'u32 vgic_eisr[2];' and 'u32 vgic_elrsr[2]' are accessed as one 'unsigned long *' bit fields, which has 64bit size. So we need to swap least significant word with most significant word when code reads those registers from h/w. Signed-off-by: Victor Kamensky --- arch/arm64/kvm/hyp.S | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S index 0620691..5035b41 100644 --- a/arch/arm64/kvm/hyp.S +++ b/arch/arm64/kvm/hyp.S @@ -415,10 +415,17 @@ CPU_BE( rev w11, w11 ) str w4, [x3, #VGIC_CPU_HCR] str w5, [x3, #VGIC_CPU_VMCR] str w6, [x3, #VGIC_CPU_MISR] +#ifndef CONFIG_CPU_BIG_ENDIAN str w7, [x3, #VGIC_CPU_EISR] str w8, [x3, #(VGIC_CPU_EISR + 4)] str w9, [x3, #VGIC_CPU_ELRSR] str w10, [x3, #(VGIC_CPU_ELRSR + 4)] +#else + str w7, [x3, #(VGIC_CPU_EISR + 4)] + str w8, [x3, #VGIC_CPU_EISR] + str w9, [x3, #(VGIC_CPU_ELRSR + 4)] + str w10, [x3, #VGIC_CPU_ELRSR] +#endif str w11, [x3, #VGIC_CPU_APR] /* Clear GICH_HCR */