From patchwork Fri Jun 13 06:08:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 4346961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F1C5A9F333 for ; Fri, 13 Jun 2014 06:11:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F107D20222 for ; Fri, 13 Jun 2014 06:11:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F98A20254 for ; Fri, 13 Jun 2014 06:11:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WvKfk-0002Tv-Rt; Fri, 13 Jun 2014 06:09:08 +0000 Received: from mailout4.samsung.com ([203.254.224.34]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WvKfR-0002MX-G0 for linux-arm-kernel@lists.infradead.org; Fri, 13 Jun 2014 06:08:50 +0000 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N7300ARRFQ0JKD0@mailout4.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 13 Jun 2014 15:08:24 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.112]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 8D.8B.24374.8559A935; Fri, 13 Jun 2014 15:08:24 +0900 (KST) X-AuditID: cbfee68d-b7fd46d000005f36-2c-539a9558134a Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id B3.A9.08203.8559A935; Fri, 13 Jun 2014 15:08:24 +0900 (KST) Received: from chan.10.32.193.11 ([10.252.81.195]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N730010DFPWDAG0@mmp1.samsung.com>; Fri, 13 Jun 2014 15:08:23 +0900 (KST) From: Chanwoo Choi To: cpufreq@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/4] Documentation: devicetree: Add cpu clock configuration data binding for Exynos3250 Date: Fri, 13 Jun 2014 15:08:12 +0900 Message-id: <1402639693-31108-4-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1402639693-31108-1-git-send-email-cw00.choi@samsung.com> References: <1402639693-31108-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrAIsWRmVeSWpSXmKPExsWyRsSkQDdi6qxgg0sPdSyeNv1gt7j+5Tmr xfwj51gt+t8sZLX4/+g1q8W5VysZLXoXXGWzONv0ht1i0+NrrBYzzu9jslh6/SKTxdMJF9ks Jkxfy2LRuvcIu8XTdUuYLdbPeM1i0bGM0WLjVw8HIY8189Ywelzu62XyWLn8C5vHplWdbB53 ru1h89i8pN6jb8sqRo/t1+Yxe3zeJBfAGcVlk5Kak1mWWqRvl8CVcfbrbuaCfvGK97vuMDYw 3hLqYuTkkBAwkfh+aB0rhC0mceHeerYuRi4OIYGljBJL+9+ywBR9/bINKrGIUWLj6RYmCKeJ SaL95BJmkCo2AS2J/S9usIHYIgKOEk8fTWUBKWIWuMws8Wf5RbAdwgKZEre+LmEHsVkEVCW2 /F0GtoJXwFXi7atvUOvkJD7seQRWwyngJnFh+xFGEFsIqObm+pNgQyUEOjkkGpf9ZYEYJCDx bfIhIJsDKCErsekAM8QcSYmDK26wTGAUXsDIsIpRNLUguaA4Kb3IUK84Mbe4NC9dLzk/dxMj MPZO/3vWu4Px9gHrQ4zJQOMmMkuJJucDYzevJN7Q2MzIwtTE1NjI3NKMNGElcd6kh0lBQgLp iSWp2ampBalF8UWlOanFhxiZODilGhh99QLzKo/s2sqUcE+Dz9281NToqEu666wlN70WLZpn NbHkmDfbv+PKSkt6OkK9LV2D2BgbJ3x3NRcVmXb3eYOp/HQflaKcKtMpB7t6VsZH5XzK7FkT aG0iwPk2KH36So5pMm/es2m89/HeLTGlqajAb0WRxdTjtcc3/WVqSPPsKHlYEfDeVImlOCPR UIu5qDgRAD8QiAzTAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLKsWRmVeSWpSXmKPExsVy+t9jAd2IqbOCDd41KVs8bfrBbnH9y3NW i/lHzrFa9L9ZyGrx/9FrVotzr1YyWvQuuMpmcbbpDbvFpsfXWC1mnN/HZLH0+kUmi6cTLrJZ TJi+lsWide8Rdoun65YwW6yf8ZrFomMZo8XGrx4OQh5r5q1h9Ljc18vksXL5FzaPTas62Tzu XNvD5rF5Sb1H35ZVjB7br81j9vi8SS6AM6qB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzA UNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6B8lhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9 RgZoIGENY8bZr7uZC/rFK97vusPYwHhLqIuRk0NCwETi65dtbBC2mMSFe+uBbC4OIYFFjBIb T7cwQThNTBLtJ5cwg1SxCWhJ7H9xA6xDRMBR4umjqSwgRcwCl5kl/iy/yAqSEBbIlLj1dQk7 iM0ioCqx5e8yFhCbV8BV4u2rbywQ6+QkPux5BFbDKeAmcWH7EUYQWwio5ub6kywTGHkXMDKs YhRNLUguKE5KzzXUK07MLS7NS9dLzs/dxAiO7GdSOxhXNlgcYhTgYFTi4V3xcWawEGtiWXFl 7iFGCQ5mJRHeew2zgoV4UxIrq1KL8uOLSnNSiw8xJgNdNZFZSjQ5H5h08kriDY1NzIwsjcwN LYyMzUkTVhLnPdBqHSgkkJ5YkpqdmlqQWgSzhYmDU6qBkcfTnvcQ58cTTNt2ZdlyWrUzf/5f Y2u4m1OlwUSMldXPIPhJCFey6kVtr4dz2C9psVn/LJgv3nLsodWz+SdqCk9Ullp/bb20/sGO rbM5Z/cLKRX22C1f2lI429b++Pme6RvTHd0+vjJZrpMp0tF9ka9DsESg4+LdGHW7734PZjd8 djldyDxbiaU4I9FQi7moOBEA2h9K4TADAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140612_230849_729122_88B010FD X-CRM114-Status: GOOD ( 10.10 ) X-Spam-Score: -5.7 (-----) Cc: Mark Rutland , devicetree@vger.kernel.org, kgene.kim@samsung.com, mturquette@linaro.org, heiko@sntech.de, Pawel Moll , Ian Campbell , viresh.kumar@linaro.org, t.figa@samsung.com, Rob Herring , cw00.choi@samsung.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, Kumar Gala , shawn.guo@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The clock block of Exynos3250 add new properties to support cpu clock provider. To register cpu clock provider of Exynos3250, must need armclk-provider-table which includes various dividers to change CPU clock to support Exynos3250 cpufreq. Cc: Thomas Abraham Cc: Tomasz Figa Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park --- .../devicetree/bindings/clock/exynos3250-clock.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos3250-clock.txt b/Documentation/devicetree/bindings/clock/exynos3250-clock.txt index aadc9c5..189b506 100644 --- a/Documentation/devicetree/bindings/clock/exynos3250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos3250-clock.txt @@ -13,6 +13,25 @@ Required Properties: - #clock-cells: should be 1. +- samsung,armclk-divider-table: when the frequency of the APLL is changed + the divider clocks in CMU_CPU clock domain also need to be updated. These + divider clocks have SoC specific divider clock output requirements for a + specific APLL clock speeds. When APLL clock rate is changed, these divider + clocks are reprogrammed with pre-determined values in order to maintain the + SoC specific divider clock outputs. This property lists the divider values + for divider clocks in the CMU_CPU block for supported APLL clock speeds. + The format of each entry included in the arm-frequency-table should be + as defined below + + cell #1: expected arm clock parent frequency + cell #2 ~ cell #7: value of clock divider in the following order + corem_ratio, atb_ratio, pclk_dbg_ratio, apll_ratio, + copy_ratio, hpm_ratio + +- samsung,armclk-cells: defines the number of cells in + samsung,armclk-divider-table property. The value of this property depends on + the SoC type. + Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. @@ -26,6 +45,19 @@ Example 1: An example of a clock controller node is listed below. compatible = "samsung,exynos3250-cmu"; reg = <0x10030000 0x20000>; #clock-cells = <1>; + + samsung,armclk-cells = <7>; + samsung,armclk-divider-table = + <1000000 1 4 7 1 7 7>, + <900000 1 3 7 1 7 7>, + <800000 1 3 7 1 7 7>, + <700000 1 3 7 1 7 7>, + <600000 1 3 7 1 7 7>, + <500000 1 3 7 1 7 7>, + <400000 1 3 7 1 7 7>, + <300000 1 3 5 1 7 7>, + <200000 1 3 3 1 7 7>, + <100000 1 1 1 1 7 7>; }; Example 2: UART controller node that consumes the clock generated by the clock