From patchwork Mon Jun 16 19:39:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 4362361 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 64AE5BEEAA for ; Mon, 16 Jun 2014 19:43:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A4A5F20279 for ; Mon, 16 Jun 2014 19:43:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDECA20256 for ; Mon, 16 Jun 2014 19:43:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WwclE-0006vf-2H; Mon, 16 Jun 2014 19:40:08 +0000 Received: from mail-ig0-f175.google.com ([209.85.213.175]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wwckz-0006ST-2R for linux-arm-kernel@lists.infradead.org; Mon, 16 Jun 2014 19:39:54 +0000 Received: by mail-ig0-f175.google.com with SMTP id uq10so3340038igb.14 for ; Mon, 16 Jun 2014 12:39:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=i1LdmJ6GjZDXypOBNWkI1jK3ionWGoCFHy/bwxsMdP4=; b=ebXTCA6Bp90rjK4s2ECLhBrJQSJp/wfgkEj1j0oOX7381T53mjX1Qg9K8CAld+0Gba +5umZ+8/igSIRhHGtBKS8v/KGqucutOigBIwQGMoX05mWzG0i8QNL0p6nrVcrA+lvd+B lAXYR2BUX+UG1hBhWYgiDvvw6lI3Ens8ZEDXpD2GYoPK/B15y4StD+Cqx4vJCZ1KSnFo SKqhPfnajXZGCvoKqb+Mb6jsXgaPJ3jIjXmSeTISEZyeQqyo+cUe8eH1YBgBhsFANTBL B8AYV1RjIuoS9hhNqs/+wHbV5RMDZVi5Hha202gWLbvZer35LeM7Emo1yK9kk2YIbtZ7 +L8Q== X-Gm-Message-State: ALoCoQnbmz0gPq+D/TurqJLBbHiuxbdsVB88pS5Kgwb9fUYjwnuMmggJWXw4BGTZiHIpOFs4H7ND X-Received: by 10.50.45.38 with SMTP id j6mr27648058igm.10.1402947570676; Mon, 16 Jun 2014 12:39:30 -0700 (PDT) Received: from localhost.localdomain (c-71-195-31-37.hsd1.mn.comcast.net. [71.195.31.37]) by mx.google.com with ESMTPSA id qo12sm22982909igb.21.2014.06.16.12.39.29 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Jun 2014 12:39:30 -0700 (PDT) From: Alex Elder To: mporter@linaro.org, bcm@fixthebug.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, arnd@arndb.de, sboyd@codeaurora.org Subject: [PATCH v5 1/5] devicetree: bindings: document Broadcom CPU enable method Date: Mon, 16 Jun 2014 14:39:43 -0500 Message-Id: <1402947587-13898-2-git-send-email-elder@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1402947587-13898-1-git-send-email-elder@linaro.org> References: <1402947587-13898-1-git-send-email-elder@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140616_123953_223012_F93F20F2 X-CRM114-Status: GOOD ( 10.71 ) X-Spam-Score: -0.8 (/) Cc: bcm-kernel-feedback-list@broadcom.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Broadcom mobile SoCs use a ROM-implemented holding pen for controlled boot of secondary cores. A special register is used to communicate to the ROM that a secondary core should start executing kernel code. This enable method is currently used for members of the bcm281xx and bcm21664 SoC families. The use of an enable method also allows the SMP operation vector to be assigned as a result of device tree content for these SoCs. Signed-off-by: Alex Elder --- Documentation/devicetree/bindings/arm/cpus.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 1fe72a0..cdca080 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -184,6 +184,7 @@ nodes to be present and contain the properties described below. can be one of: "allwinner,sun6i-a31" "arm,psci" + "brcm,bcm11351-cpu-method" "marvell,armada-375-smp" "marvell,armada-380-smp" "marvell,armada-xp-smp" @@ -215,6 +216,17 @@ nodes to be present and contain the properties described below. Value type: Definition: Specifies the ACC[2] node associated with this CPU. + - secondary-boot-reg + Usage: + Required for systems that have an "enable-method" + property value of "brcm,bcm11351-cpu-method". + Value type: + Definition: + Specifies the physical address of the register used to + request the ROM holding pen code release a secondary + CPU. The value written to the register is formed by + encoding the target CPU id into the low bits of the + physical start address it should jump to. Example 1 (dual-cluster big.LITTLE system 32-bit):