From patchwork Tue Jun 17 17:11:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 4369231 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BB3B8BEEAA for ; Tue, 17 Jun 2014 17:14:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DD44820204 for ; Tue, 17 Jun 2014 17:14:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0A982201FE for ; Tue, 17 Jun 2014 17:14:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wwwvc-00052f-CP; Tue, 17 Jun 2014 17:12:12 +0000 Received: from mail-wi0-f182.google.com ([209.85.212.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WwwvV-0004ar-Qt for linux-arm-kernel@lists.infradead.org; Tue, 17 Jun 2014 17:12:06 +0000 Received: by mail-wi0-f182.google.com with SMTP id bs8so6238286wib.9 for ; Tue, 17 Jun 2014 10:11:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=owBBZGW3BwhQe442/3geFrXbVtJTObVDIFYs0SGUMYo=; b=aSmtjvmd98IPhcZ6YEbRjhRdPM7tyWpbkoEhebaem8Uq8fXiROTGZj/9TsyHN0tCW0 ksz80ok5WcgVZxOpjuPk7ED545HbpJ4YDWA4TMFwVXnbtRMepCf3AO4W9U0Vz7iF5pNr 5MU3JTtRfaIfJHTFH6NtM53U57O+caYR+mBgHN106+FKFgMJsp9p5Jz0QEXlCGHISAxW E4fzdovXGx5fWAu3gg4jUqfXBXhiyrYyTjclP6f8O87Lpz/TdDHIbZYF5uk/Sw6+PanH 9k8+we4HsidUPD0xgrmP5CkKQchHphn/HrNzJjqnkOfyyUCAS33i+W7rUDqnCDtaFgXV UpFg== X-Gm-Message-State: ALoCoQnQwK63bXnSiRovnUpejWGXxqhnAoSBRw0MneT97pf3E5RgkJcdaiHz1hj1Xl84MoUX/G8p X-Received: by 10.194.110.10 with SMTP id hw10mr15777082wjb.81.1403025081314; Tue, 17 Jun 2014 10:11:21 -0700 (PDT) Received: from localhost.localdomain ([109.129.12.44]) by mx.google.com with ESMTPSA id w9sm42284051eev.4.2014.06.17.10.11.19 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Jun 2014 10:11:20 -0700 (PDT) From: Jean Pihet To: Will Deacon , linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, Sneha Priya , linux-kernel@vger.kernel.org Subject: [PATCH] ARM: perf: allow tracing with kernel tracepoints events Date: Tue, 17 Jun 2014 19:11:05 +0200 Message-Id: <1403025065-18001-1-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140617_101206_063145_8EFA301B X-CRM114-Status: GOOD ( 12.89 ) X-Spam-Score: -0.7 (/) Cc: Jean Pihet X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When tracing with tracepoints events the IP and CPSR are set to 0, preventing the perf code to resolve the symbols: ./perf record -e kmem:kmalloc cal [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.007 MB perf.data (~321 samples) ] ./perf report Overhead Command Shared Object Symbol ........ ....... ............. ........... 40.78% cal [unknown] [.]00000000 31.6% cal [unknown] [.]00000000 The examination of the gathered samples (perf report -D) shows the IP is set to 0 and that the samples are considered as user space samples, while the IP should be set from the registers and the samples should be considered as kernel samples. The fix is to implement perf_arch_fetch_caller_regs for ARM, which fills the necessary registers used for the callchain unwinding and to determine the user/kernel space property of the samples: ip, sp, fp and cpsr. Tested with perf record and tracepoints filtering (-e ), with unwinding using fp (--call-graph fp) and dwarf info (--call-graph dwarf). Reported by Sneha Priya on linaro-dev, cf. http://lists.linaro.org/pipermail/linaro-dev/2014-May/017151.html Signed-off-by: Jean Pihet Cc: Will Deacon Reported-by: Sneha Priya --- arch/arm/include/asm/perf_event.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h index 7558775..5e31d46 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h @@ -26,6 +26,25 @@ struct pt_regs; extern unsigned long perf_instruction_pointer(struct pt_regs *regs); extern unsigned long perf_misc_flags(struct pt_regs *regs); #define perf_misc_flags(regs) perf_misc_flags(regs) + +/* + * Take a snapshot of the regs. + * We only need a few of the regs: + * - ip for PERF_SAMPLE_IP + * - sp, fp for callchains + * - cpsr for user_mode() tests + */ +#define perf_arch_fetch_caller_regs(regs, __ip) { \ + instruction_pointer(regs)= (__ip); \ + __asm__ ( \ + "mov %[_ARM_sp], sp \n\t" \ + "mov %[_ARM_fp], fp \n\t" \ + "mrs %[_ARM_cpsr], cpsr \n\t" \ + : [_ARM_sp] "=r" (regs->ARM_sp), \ + [_ARM_fp] "=r" (regs->ARM_fp), \ + [_ARM_cpsr] "=r" (regs->ARM_cpsr) \ + ); \ +} #endif #endif /* __ARM_PERF_EVENT_H__ */