From patchwork Wed Jun 18 06:16:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 4373431 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B103A9F314 for ; Wed, 18 Jun 2014 06:21:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C2247200E5 for ; Wed, 18 Jun 2014 06:21:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A988A201BC for ; Wed, 18 Jun 2014 06:21:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wx9D4-0006A4-99; Wed, 18 Jun 2014 06:19:02 +0000 Received: from mail-oa0-f74.google.com ([209.85.219.74]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wx9B3-0005DS-Tb for linux-arm-kernel@lists.infradead.org; Wed, 18 Jun 2014 06:17:08 +0000 Received: by mail-oa0-f74.google.com with SMTP id i7so107514oag.3 for ; Tue, 17 Jun 2014 23:16:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b9nh8xPC7PiWp79M3CWRVxxw05P2UPv2fT5HCL7pRzc=; b=RpYqGi0jyqUQ5mA55Ff1m/zs0XbAlLUtOWZFcJhzHXI8wG/wkptex1qqPL2lneDXoa tz6QKq6bWkN7Mx8UJeLwckeLty24onLgPNpt4mCp5S4aGYh51H4XFtpRpRfRrUE9FEmX QoS4HUVakNzoNhzYKYEM1Lq1c4uU5tu+ETZJ6kQN+p7FFc5YeV2ooB96bchWF2PQxSvB tVquan87RajAoRIxP+10EcnWP683B/sK304o0o5WxE+8VJW8FaYk4of8blcVCBJGUWuT Vp00v0LWGmz97ccDUR6RjNKQ4ex8pF2zgrKqSnPe2XRS1NZXKaSdb7JMwNkvtRMfP8pw I9hA== X-Gm-Message-State: ALoCoQlHnGuoLFMd0jmKk/pvAW/PuXT5ykIy8spYfl0NTa0aZoTwPxl6D2S7jIUkN8smPKVYmrpY X-Received: by 10.43.126.130 with SMTP id gw2mr418997icc.15.1403072195713; Tue, 17 Jun 2014 23:16:35 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id t4si74593yhm.0.2014.06.17.23.16.35 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 17 Jun 2014 23:16:35 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 7352F5A449E; Tue, 17 Jun 2014 23:16:35 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 3613D220378; Tue, 17 Jun 2014 23:16:35 -0700 (PDT) From: Andrew Bresticker To: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org Subject: [PATCH v1 3/9] of: Update Tegra XUSB pad controller binding for USB Date: Tue, 17 Jun 2014 23:16:14 -0700 Message-Id: <1403072180-4944-4-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1403072180-4944-1-git-send-email-abrestic@chromium.org> References: <1403072180-4944-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140617_231658_064332_CC065BF8 X-CRM114-Status: GOOD ( 13.94 ) X-Spam-Score: -1.8 (-) Cc: Mark Rutland , Russell King , Mathias Nyman , Pawel Moll , Ian Campbell , Andrew Bresticker , Greg Kroah-Hartman , Linus Walleij , Randy Dunlap , Kishon Vijay Abraham I , Grant Likely , Rob Herring , Thierry Reding , Kumar Gala , Stephen Warren , Alan Stern , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add new bindings used for USB support by the Tegra XUSB pad controller. This includes additional PHY types, USB-specific pinconfig properties, etc. Signed-off-by: Andrew Bresticker --- .../pinctrl/nvidia,tegra124-xusb-padctl.txt | 53 ++++++++++++++++++++-- include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h | 7 +++ 2 files changed, 56 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt index 2f9c0bd..6181019 100644 --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt @@ -21,6 +21,12 @@ Required properties: - padctl - #phy-cells: Should be 1. The specifier is the index of the PHY to reference. See for the list of valid values. +- nvidia,xusb-mbox: Handle to the Tegra XUSB mailbox node. + +Optional properties: +------------------- +- vbus-otg-{0,1,2}-supply: VBUS regulator for the corresponding UTMI pad. +- vddio-hsic-supply: VDDIO regulator for the HSIC pads. Lane muxing: ------------ @@ -50,6 +56,16 @@ Optional properties: pin or group should be assigned to. Valid values for function names are listed below. - nvidia,iddq: Enables IDDQ mode of the lane. (0: no, 1: yes) +- nvidia,usb3-port-num: USB3 port (0 or 1) to which the lane is mapped. +- nvidia,usb2-port-num: USB2 port (0, 1, or 2) to which the lane is mapped. +- nvidia,hsic-strobe-trim: HSIC strobe trimmer value. +- nvidia,hsic-rx-strobe-trim: HSIC RX strobe trimmer value. +- nvidia,hsic-rx-data-trim: HSIC RX data trimmer value. +- nvidia,hsic-tx-rtune-n: HSIC TX RTUNEN value. +- nvidia,hsic-tx-rtune-p: HSIC TX RTUNEP value. +- nvidia,hsic-tx-slew-n: HSIC TX SLEWN value. +- nvidia,hsic-tx-slew-p: HSIC TX SLEWP value. +- nvidia,hsic-auto-term: Enables HSIC AUTO_TERM. (0: no, 1: yes) Note that not all of these properties are valid for all lanes. Lanes can be divided into three groups: @@ -58,18 +74,25 @@ divided into three groups: Valid functions for this group are: "snps", "xusb", "uart", "rsvd". - The nvidia,iddq property does not apply to this group. + The nvidia,iddq, nvidia,usb3-port-num, nvidia,usb2-port-num, and + nvidia,hsic-* properties do not apply to this group. - ulpi-0, hsic-0, hsic-1: Valid functions for this group are: "snps", "xusb". - The nvidia,iddq property does not apply to this group. + The nvidia,iddq, nvidia,usb3-port-num, and nvidia,usb2-port-num + properties do not apply to this group. The nvidia,hsic-* properties + apply only to the pins hsic-{0,1} when the function is xusb. - pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, sata-0: Valid functions for this group are: "pcie", "usb3", "sata", "rsvd". + The nvidia,usb3-port-num and nvidia,usb2-port-num properties only + apply and are required when the function is usb3. The nvidia,hsic-* + properties do not apply to this group. + Example: ======== @@ -83,6 +106,8 @@ SoC file extract: resets = <&tegra_car 142>; reset-names = "padctl"; + nvidia,xusb-mbox = <&mbox>; + #phy-cells = <1>; }; @@ -100,15 +125,35 @@ Board file extract: ... + usb@0,70090000 { + ... + + phys = <&padctl 5>, <&padctl 6>, <&padctl 7>; + phy-names = "utmi-1", "utmi-2", "usb3-0"; + + ... + } + + ... + padctl: padctl@0,7009f000 { pinctrl-0 = <&padctl_default>; pinctrl-names = "default"; + vbus-otg-2-supply = <&vdd_usb3_vbus>; + padctl_default: pinmux { - usb3 { - nvidia,lanes = "pcie-0", "pcie-1"; + otg { + nvidia,lanes = "otg-1", "otg-2"; + nvidia,function = "xusb"; + }; + + usb3p0 { + nvidia,lanes = "pcie-0"; nvidia,function = "usb3"; nvidia,iddq = <0>; + nvidia,usb3-port-num = <0>; + nvidia,usb2-port-num = <2>; }; pcie { diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h b/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h index 914d56d..c83a4d4 100644 --- a/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h +++ b/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h @@ -3,5 +3,12 @@ #define TEGRA_XUSB_PADCTL_PCIE 0 #define TEGRA_XUSB_PADCTL_SATA 1 +#define TEGRA_XUSB_PADCTL_USB3_P0 2 +#define TEGRA_XUSB_PADCTL_USB3_P1 3 +#define TEGRA_XUSB_PADCTL_UTMI_P0 4 +#define TEGRA_XUSB_PADCTL_UTMI_P1 5 +#define TEGRA_XUSB_PADCTL_UTMI_P2 6 +#define TEGRA_XUSB_PADCTL_HSIC_P0 7 +#define TEGRA_XUSB_PADCTL_HSIC_P1 8 #endif /* _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H */