| Message ID | 1404498697-21978-3-git-send-email-ezequiel.garcia@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hello. On 07/04/2014 10:31 PM, Ezequiel Garcia wrote: > This commit adds the support for the network controller in Marvell > Armada 375 SoC devicetree. > Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> > --- > arch/arm/boot/dts/armada-375.dtsi | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi > index fb92551..5e897d2 100644 > --- a/arch/arm/boot/dts/armada-375.dtsi > +++ b/arch/arm/boot/dts/armada-375.dtsi > @@ -151,6 +151,37 @@ > <0xc100 0x100>; > }; > > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "marvell,orion-mdio"; > + reg = <0xc0054 0x4>; > + }; > + > + /* Network controller */ > + pp2@f0000 { > + compatible = "marvell,armada-375-pp2"; > + reg = <0xf0000 0xa000>, /* Packet Processor regs */ > + <0xc0000 0x3060>, /* LMS regs */ > + <0xc4000 0x100>, /* eth0 regs */ > + <0xc5000 0x100>; /* eth1 regs */ Hm, why are the above two ranges not listed under the "ethernet" subnodes? > + clocks = <&gateclk 3>, <&gateclk 19>; > + clock-names = "pp_clk", "gop_clk"; > + status = "disabled"; > + > + eth0: ethernet@c4000 { > + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > + port-id = <0>; > + status = "disabled"; > + }; > + > + eth1: ethernet@c5000 { > + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > + port-id = <1>; > + status = "disabled"; > + }; > + }; > + WBR, Sergei
On 04 Jul 10:51 PM, Sergei Shtylyov wrote: > >+ /* Network controller */ > >+ pp2@f0000 { > >+ compatible = "marvell,armada-375-pp2"; > >+ reg = <0xf0000 0xa000>, /* Packet Processor regs */ > >+ <0xc0000 0x3060>, /* LMS regs */ > >+ <0xc4000 0x100>, /* eth0 regs */ > >+ <0xc5000 0x100>; /* eth1 regs */ > > Hm, why are the above two ranges not listed under the "ethernet" subnodes? > Because as far as I know, if we want to put reg = <...> properties in a sub-node, then the parent node has to be a bus, but that's not the case. I can't remember where have I read that, I'll take a look at the reference.
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index fb92551..5e897d2 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -151,6 +151,37 @@ <0xc100 0x100>; }; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; + reg = <0xc0054 0x4>; + }; + + /* Network controller */ + pp2@f0000 { + compatible = "marvell,armada-375-pp2"; + reg = <0xf0000 0xa000>, /* Packet Processor regs */ + <0xc0000 0x3060>, /* LMS regs */ + <0xc4000 0x100>, /* eth0 regs */ + <0xc5000 0x100>; /* eth1 regs */ + clocks = <&gateclk 3>, <&gateclk 19>; + clock-names = "pp_clk", "gop_clk"; + status = "disabled"; + + eth0: ethernet@c4000 { + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + port-id = <0>; + status = "disabled"; + }; + + eth1: ethernet@c5000 { + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + port-id = <1>; + status = "disabled"; + }; + }; + spi0: spi@10600 { compatible = "marvell,orion-spi"; reg = <0x10600 0x50>;
This commit adds the support for the network controller in Marvell Armada 375 SoC devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> --- arch/arm/boot/dts/armada-375.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)