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Mon, 07 Jul 2014 22:08:39 +0900 (KST) From: Vikas Sajjan To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v6 4/4] clk: samsung: exynos5420: Setup clocks before system suspend Date: Mon, 07 Jul 2014 18:35:29 +0530 Message-id: <1404738329-511-1-git-send-email-vikas.sajjan@samsung.com> X-Mailer: git-send-email 1.7.9.5 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKLMWRmVeSWpSXmKPExsWyRsSkTvf67F3BBnv71C0er1nMZHF22UE2 i++7vrBb9C64ymax6fE1VosZ5/cxWTw5/JHVYtWuP4wWN59tZ3Lg9JjdcJHFY+esu+wem5fU e/RtWcXo8XmTXABrFJdNSmpOZllqkb5dAlfG0RndbAVTpCpmz7vM0sC4U7SLkZNDQsBEor/h ADuELSZx4d56ti5GLg4hgaWMEjtf7WOBKfrU0s4IkVjEKPGi8z1Yh5DABCaJW3fMQGw2AV2J FaeeA3VzcIgIeEssv6YIEmYWOM0o0dpjCmILC4RJXNm/nBXEZhFQlWg5s4YZxOYVcJO48eoO WKuEgILEnEk2IKskBPrZJU68nswMUS8g8W3yIRaIGlmJTQeYIU6TlDi44gbLBEbBBYwMqxhF UwuSC4qT0ouM9YoTc4tL89L1kvNzNzECg/j0v2f9OxjvHrA+xJgMNG4is5Rocj4wCvJK4g2N zYwsTE1MjY3MLc1IE1YS573/MClISCA9sSQ1OzW1ILUovqg0J7X4ECMTB6dUA6OS5bvjT9UO LZFMN0ku8pTQkF+TOOHRTWZRn4a1G8V6VXffXf4/MHPFnKPz5GTyOFbev5mdLslV9f7jhMOX SiIvBzx+zfFMcMal57qWgh4FnlqTa7nZbp7fkOPHLd6Vsyh5v/P8gmBu5i6280Lyy74Y3mso NFV4zKS2jrs1x66RQ/3W0b1cKUosxRmJhlrMRcWJAB9Zuk54AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCIsWRmVeSWpSXmKPExsVy+t9jAd3rs3cFG6w4J2fxeM1iJouzyw6y WXzf9YXdonfBVTaLTY+vsVrMOL+PyeLJ4Y+sFqt2/WG0uPlsO5MDp8fshossHjtn3WX32Lyk 3qNvyypGj8+b5AJYoxoYbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwMdQ0tLcyVFPISc1Nt lVx8AnTdMnOADlJSKEvMKQUKBSQWFyvp22GaEBripmsB0xih6xsSBNdjZIAGEtYwZhyd0c1W MEWqYva8yywNjDtFuxg5OSQETCQ+tbQzQthiEhfurWfrYuTiEBJYxCjxovM9O0hCSGACk8St O2YgNpuArsSKU8+Bijg4RAS8JZZfUwQJMwucZpRo7TEFsYUFwiSu7F/OCmKzCKhKtJxZwwxi 8wq4Sdx4dQesVUJAQWLOJJsJjNwLGBlWMYqmFiQXFCel5xrpFSfmFpfmpesl5+duYgTHyDPp HYyrGiwOMQpwMCrx8B5YtTNYiDWxrLgy9xCjBAezkgjv9PhdwUK8KYmVValF+fFFpTmpxYcY TYGWT2SWEk3OB8ZvXkm8obGJuamxqaWJhYmZpZI478FW60AhgfTEktTs1NSC1CKYPiYOTqkG xgRecdVnMvlFZ5+WNrbE/Ne6zdCUc2hJ7D+DsLd3W9L81hybtP5ESFai4onwZfUHRNUqP2m1 LX5v906tI8n0tvjW1EczNzq1Cxm/bPYoW/JR0OfD7tbppyYumrc4gHu+eT3zdRG902eXxXWX nK5xMm9aWrxfPz/miNqBA1s+tz2eGup93LuFWYmlOCPRUIu5qDgRABSvP2qnAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140707_060901_267028_9A709F0C X-CRM114-Status: GOOD ( 10.71 ) X-Spam-Score: -5.7 (-----) Cc: sajjan.linux@gmail.com, kgene.kim@samsung.com, tomasz.figa@gmail.com, dianders@chromium.org, Abhilash Kesavan , Vikas Sajjan , joshi@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Prior to suspending the system, we need to ensure that certain clock source and gate registers are unmasked. while at it, add these clks to save/restore list also. Signed-off-by: Vikas Sajjan Signed-off-by: Abhilash Kesavan --- drivers/clk/samsung/clk-exynos5420.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 9d7d7ee..7e87d7c 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -28,6 +28,7 @@ #define GATE_BUS_CPU 0x700 #define GATE_SCLK_CPU 0x800 #define CLKOUT_CMU_CPU 0xa00 +#define SRC_MASK_CPERI 0x4300 #define GATE_IP_G2D 0x8800 #define CPLL_LOCK 0x10020 #define DPLL_LOCK 0x10030 @@ -70,6 +71,8 @@ #define SRC_TOP11 0x10284 #define SRC_TOP12 0x10288 #define SRC_TOP13 0x1028c /* 5800 specific */ +#define SRC_MASK_TOP0 0x10300 +#define SRC_MASK_TOP1 0x10304 #define SRC_MASK_TOP2 0x10308 #define SRC_MASK_TOP7 0x1031c #define SRC_MASK_DISP10 0x1032c @@ -77,6 +80,7 @@ #define SRC_MASK_FSYS 0x10340 #define SRC_MASK_PERIC0 0x10350 #define SRC_MASK_PERIC1 0x10354 +#define SRC_MASK_ISP 0x10370 #define DIV_TOP0 0x10500 #define DIV_TOP1 0x10504 #define DIV_TOP2 0x10508 @@ -98,6 +102,7 @@ #define DIV2_RATIO0 0x10590 #define DIV4_RATIO 0x105a0 #define GATE_BUS_TOP 0x10700 +#define GATE_BUS_DISP1 0x10728 #define GATE_BUS_GEN 0x1073c #define GATE_BUS_FSYS0 0x10740 #define GATE_BUS_FSYS2 0x10748 @@ -190,6 +195,10 @@ static unsigned long exynos5x_clk_regs[] __initdata = { SRC_MASK_FSYS, SRC_MASK_PERIC0, SRC_MASK_PERIC1, + SRC_MASK_TOP0, + SRC_MASK_TOP1, + SRC_MASK_MAU, + SRC_MASK_ISP, SRC_ISP, DIV_TOP0, DIV_TOP1, @@ -208,6 +217,7 @@ static unsigned long exynos5x_clk_regs[] __initdata = { SCLK_DIV_ISP1, DIV2_RATIO0, DIV4_RATIO, + GATE_BUS_DISP1, GATE_BUS_TOP, GATE_BUS_GEN, GATE_BUS_FSYS0, @@ -249,6 +259,22 @@ static unsigned long exynos5800_clk_regs[] __initdata = { GATE_IP_CAM, }; +static const struct samsung_clk_reg_dump exynos5420_set_clksrc[] = { + { .offset = SRC_MASK_CPERI, .value = 0xffffffff, }, + { .offset = SRC_MASK_TOP0, .value = 0x11111111, }, + { .offset = SRC_MASK_TOP1, .value = 0x11101111, }, + { .offset = SRC_MASK_TOP2, .value = 0x11111110, }, + { .offset = SRC_MASK_TOP7, .value = 0x00111100, }, + { .offset = SRC_MASK_DISP10, .value = 0x11111110, }, + { .offset = SRC_MASK_MAU, .value = 0x10000000, }, + { .offset = SRC_MASK_FSYS, .value = 0x11111110, }, + { .offset = SRC_MASK_PERIC0, .value = 0x11111110, }, + { .offset = SRC_MASK_PERIC1, .value = 0x11111100, }, + { .offset = SRC_MASK_ISP, .value = 0x11111000, }, + { .offset = GATE_BUS_DISP1, .value = 0xffffffff, }, + { .offset = GATE_IP_PERIC, .value = 0xffffffff, }, +}; + static int exynos5420_clk_suspend(void) { samsung_clk_save(reg_base, exynos5x_save, @@ -258,6 +284,9 @@ static int exynos5420_clk_suspend(void) samsung_clk_save(reg_base, exynos5800_save, ARRAY_SIZE(exynos5800_clk_regs)); + samsung_clk_restore(reg_base, exynos5420_set_clksrc, + ARRAY_SIZE(exynos5420_set_clksrc)); + return 0; }