From patchwork Fri Jul 11 02:55:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 4529761 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 27A99BEECB for ; Fri, 11 Jul 2014 02:59:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4812D201F2 for ; Fri, 11 Jul 2014 02:59:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5698C201BC for ; Fri, 11 Jul 2014 02:59:54 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X5R2L-0002kM-NO; Fri, 11 Jul 2014 02:58:13 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X5R1t-0002KB-3t for linux-arm-kernel@lists.infradead.org; Fri, 11 Jul 2014 02:57:45 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s6B2vRSG015081; Thu, 10 Jul 2014 21:57:27 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6B2vQiK024025; Thu, 10 Jul 2014 21:57:26 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Thu, 10 Jul 2014 21:57:26 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6B2vQ1o032672; Thu, 10 Jul 2014 21:57:26 -0500 Received: from localhost (j-172-22-132-241.vpn.ti.com [172.22.132.241]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s6B2vPt15891; Thu, 10 Jul 2014 21:57:26 -0500 (CDT) From: Dave Gerlach To: , Subject: [PATCH v4 08/11] ARM: OMAP2+: AM33XX: Reserve memory to comply with EMIF spec Date: Thu, 10 Jul 2014 21:55:46 -0500 Message-ID: <1405047349-15101-9-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1405047349-15101-1-git-send-email-d-gerlach@ti.com> References: <1405047349-15101-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140710_195745_257214_0D909BFE X-CRM114-Status: GOOD ( 15.03 ) X-Spam-Score: -5.7 (-----) Cc: Nishanth Menon , Paul Walmsley , Kevin Hilman , Dave Gerlach , Tony Lindgren , Vaibhav Bedia , Tero Kristo , Russ Dill , Benoit Cousson , Santosh Shilimkar , Daniel Mack X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vaibhav Bedia SDRAM controller on AM33XX requires that a modification of certain bit-fields in PWR_MGMT_CTRL register (ref. section 7.3.5.13 in AM335x-Rev H) is followed by a dummy read access to SDRAM. This scenario arises when entering a low power state like DeepSleep. To ensure that the read is not from a cached region we reserve some memory during bootup using the arm_memblock_steal() API. The original call to omap_reserve is removed as it is not used in any way on am335x. A subsequent patch will pass along the location of the reserved memory location to the AM335x suspend handler which modifies the PWR_MGMT_CTRL register in the EMIF. Signed-off-by: Vaibhav Bedia Signed-off-by: Dave Gerlach --- v3->v4: Left as is because of use in sram code when EMIF is off to avoid copying additional code. Also uses hardcoded virtual address now to avoid problems with himem arch/arm/mach-omap2/board-generic.c | 2 +- arch/arm/mach-omap2/common.c | 32 ++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/common.h | 4 ++++ arch/arm/mach-omap2/io.c | 1 + 4 files changed, 38 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 9480997..d2c435e 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -163,7 +163,7 @@ static const char *am33xx_boards_compat[] __initconst = { }; DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") - .reserve = omap_reserve, + .reserve = am33xx_reserve, .map_io = am33xx_map_io, .init_early = am33xx_init_early, .init_irq = omap_intc_of_init, diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 2dabb9e..df6394e 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -15,10 +15,14 @@ #include #include #include +#include +#include #include "common.h" #include "omap-secure.h" +#define AM33XX_DRAM_SYNC_VA 0xfe600000 + /* * Stub function for OMAP2 so that common files * continue to build when custom builds are used @@ -34,3 +38,31 @@ void __init omap_reserve(void) omap_secure_ram_reserve_memblock(); omap_barrier_reserve_memblock(); } + +static phys_addr_t am33xx_paddr; +static u32 am33xx_size; + +/* Steal one page physical memory for uncached read DeepSleep */ +void __init am33xx_reserve(void) +{ + am33xx_size = ALIGN(PAGE_SIZE, SZ_1M); + am33xx_paddr = arm_memblock_steal(am33xx_size, SZ_1M); + + omap_reserve(); +} + +void __iomem *am33xx_dram_sync; + +void __init am33xx_dram_sync_init(void) +{ + struct map_desc dram_io_desc[1]; + + dram_io_desc[0].virtual = AM33XX_DRAM_SYNC_VA; + dram_io_desc[0].pfn = __phys_to_pfn(am33xx_paddr); + dram_io_desc[0].length = am33xx_size; + dram_io_desc[0].type = MT_MEMORY_RW_SO; + + iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); + + am33xx_dram_sync = (void __iomem *) dram_io_desc[0].virtual; +} diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index b2d252b..1536338 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -316,6 +316,10 @@ extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap2_hsmmc_info; extern void omap_reserve(void); +extern void am33xx_reserve(void); +extern void am33xx_dram_sync_init(void); +extern void __iomem *am33xx_dram_sync; + struct omap_hwmod; extern int omap_dss_reset(struct omap_hwmod *); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 8f55945..4d4d150 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -313,6 +313,7 @@ void __init ti81xx_map_io(void) void __init am33xx_map_io(void) { iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); + am33xx_dram_sync_init(); } #endif