| Message ID | 1405667500-7402-1-git-send-email-mperttunen@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement. I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation? Thanks, Mikko On 18/07/14 10:11, Mikko Perttunen wrote: > This patch adds device tree binding documentation for the SATA > controller found on NVIDIA Tegra SoCs. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > v5: remove ordering requirement again > > .../devicetree/bindings/ata/tegra-sata.txt | 30 ++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > create mode 100644 Documentation/devicetree/bindings/ata/tegra-sata.txt > > diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt > new file mode 100644 > index 0000000..946f207 > --- /dev/null > +++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt > @@ -0,0 +1,30 @@ > +Tegra124 SoC SATA AHCI controller > + > +Required properties : > +- compatible : "nvidia,tegra124-ahci". > +- reg : Should contain 2 entries: > + - AHCI register set (SATA BAR5) > + - SATA register set > +- interrupts : Defines the interrupt used by SATA > +- clocks : Must contain an entry for each entry in clock-names. > + See ../clocks/clock-bindings.txt for details. > +- clock-names : Must include the following entries: > + - sata > + - sata-oob > + - cml1 > + - pll_e > +- resets : Must contain an entry for each entry in reset-names. > + See ../reset/reset.txt for details. > +- reset-names : Must include the following entries: > + - sata > + - sata-oob > + - sata-cold > +- phys : Must contain an entry for each entry in phy-names. > + See ../phy/phy-bindings.txt for details. > +- phy-names : Must include the following entries: > + - sata-phy : XUSB PADCTL SATA PHY > +- hvdd-supply : Defines the SATA HVDD regulator > +- vddio-supply : Defines the SATA VDDIO regulator > +- avdd-supply : Defines the SATA AVDD regulator > +- target-5v-supply : Defines the SATA 5V power regulator > +- target-12v-supply : Defines the SATA 12V power regulator >
Hi, On 07/18/2014 09:11 AM, Mikko Perttunen wrote: > This patch adds device tree binding documentation for the SATA > controller found on NVIDIA Tegra SoCs. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > v5: remove ordering requirement again Acked-by: Hans de Goede <hdegoede@redhat.com> Regards, Hans > > .../devicetree/bindings/ata/tegra-sata.txt | 30 ++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > create mode 100644 Documentation/devicetree/bindings/ata/tegra-sata.txt > > diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt > new file mode 100644 > index 0000000..946f207 > --- /dev/null > +++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt > @@ -0,0 +1,30 @@ > +Tegra124 SoC SATA AHCI controller > + > +Required properties : > +- compatible : "nvidia,tegra124-ahci". > +- reg : Should contain 2 entries: > + - AHCI register set (SATA BAR5) > + - SATA register set > +- interrupts : Defines the interrupt used by SATA > +- clocks : Must contain an entry for each entry in clock-names. > + See ../clocks/clock-bindings.txt for details. > +- clock-names : Must include the following entries: > + - sata > + - sata-oob > + - cml1 > + - pll_e > +- resets : Must contain an entry for each entry in reset-names. > + See ../reset/reset.txt for details. > +- reset-names : Must include the following entries: > + - sata > + - sata-oob > + - sata-cold > +- phys : Must contain an entry for each entry in phy-names. > + See ../phy/phy-bindings.txt for details. > +- phy-names : Must include the following entries: > + - sata-phy : XUSB PADCTL SATA PHY > +- hvdd-supply : Defines the SATA HVDD regulator > +- vddio-supply : Defines the SATA VDDIO regulator > +- avdd-supply : Defines the SATA AVDD regulator > +- target-5v-supply : Defines the SATA 5V power regulator > +- target-12v-supply : Defines the SATA 12V power regulator >
Hi, On 07/18/2014 09:16 AM, Mikko Perttunen wrote: > So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement. > > I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation? Yes that works for me v3 of all the patches with no newer version + v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov, Tejun can you pick these up for 3.17 please? And thanks for working on a name-based ahci_platform_get_resources function since what we've now in v5 is quite clean already I think it will be good to take our time to get this right, so postponing this to 3.18 is fine with me. Regards, Hans
On 18/07/14 13:28, Hans de Goede wrote: > Hi, > > On 07/18/2014 09:16 AM, Mikko Perttunen wrote: >> So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement. >> >> I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation? > > Yes that works for me v3 of all the patches with no newer version + > v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov, > Tejun can you pick these up for 3.17 please? Note that the DTC step will fail if Thierry's xusb pinctrl series is not applied before this one. (The DTS changes depend on a node called 'padctl' and the pinctrl-tegra-xusb header) > > And thanks for working on a name-based ahci_platform_get_resources function > since what we've now in v5 is quite clean already I think it will be good > to take our time to get this right, so postponing this to 3.18 is fine > with me. Yes. > > Regards, > > Hans > Thanks, Mikko
On Fri, Jul 18, 2014 at 12:28:54PM +0200, Hans de Goede wrote: > Hi, > > On 07/18/2014 09:16 AM, Mikko Perttunen wrote: > > So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement. > > > > I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation? > > Yes that works for me v3 of all the patches with no newer version + > v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov, > Tejun can you pick these up for 3.17 please? Tejun, I think the following patches can go through your tree without causing breakage through unresolved dependencies: [PATCH v5 1/8] of: Add NVIDIA Tegra SATA controller binding [PATCH v3 6/8] ata: ahci_platform: Increase AHCI_MAX_CLKS to 4 [PATCH v5 7/8] ata: Add support for the Tegra124 SATA controller Peter, you should probably pick up [PATCH v3 4/8] clk: tegra: Enable hardware control of SATA PLL [PATCH v3 5/8] clk: tegra: Add SATA clocks to Tegra124 initialization table and send them off to Mike for 3.17 if there's still time. Stephen, the rest of the patches would probably best go through the Tegra tree so that we can handle the dependencies there. I've already sent out pull requests for 3.17 today, but maybe Arnd and Olof can be convinced to take one more. Thierry
On Fri, Jul 18, 2014 at 05:06:04PM +0200, Thierry Reding wrote: > I think the following patches can go through your tree without causing > breakage through unresolved dependencies: > > [PATCH v5 1/8] of: Add NVIDIA Tegra SATA controller binding > [PATCH v3 6/8] ata: ahci_platform: Increase AHCI_MAX_CLKS to 4 > [PATCH v5 7/8] ata: Add support for the Tegra124 SATA controller Applied to libata/for-3.17 w/ Hans' acks added. Please check the following branch and give me a holler if something is amiss. git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-3.17 Thanks.
On 07/18/2014 09:06 AM, Thierry Reding wrote: > On Fri, Jul 18, 2014 at 12:28:54PM +0200, Hans de Goede wrote: >> Hi, >> >> On 07/18/2014 09:16 AM, Mikko Perttunen wrote: >>> So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement. >>> >>> I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation? >> >> Yes that works for me v3 of all the patches with no newer version + >> v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov, >> Tejun can you pick these up for 3.17 please? > > Tejun, > > I think the following patches can go through your tree without causing > breakage through unresolved dependencies: ... > Stephen, the rest of the patches would probably best go through the > Tegra tree so that we can handle the dependencies there. I've already > sent out pull requests for 3.17 today, but maybe Arnd and Olof can be > convinced to take one more. At this point, I'm just going to wait for 3.18 for anything that didn't make it into 3.17.
diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt new file mode 100644 index 0000000..946f207 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt @@ -0,0 +1,30 @@ +Tegra124 SoC SATA AHCI controller + +Required properties : +- compatible : "nvidia,tegra124-ahci". +- reg : Should contain 2 entries: + - AHCI register set (SATA BAR5) + - SATA register set +- interrupts : Defines the interrupt used by SATA +- clocks : Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names : Must include the following entries: + - sata + - sata-oob + - cml1 + - pll_e +- resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names : Must include the following entries: + - sata + - sata-oob + - sata-cold +- phys : Must contain an entry for each entry in phy-names. + See ../phy/phy-bindings.txt for details. +- phy-names : Must include the following entries: + - sata-phy : XUSB PADCTL SATA PHY +- hvdd-supply : Defines the SATA HVDD regulator +- vddio-supply : Defines the SATA VDDIO regulator +- avdd-supply : Defines the SATA AVDD regulator +- target-5v-supply : Defines the SATA 5V power regulator +- target-12v-supply : Defines the SATA 12V power regulator
This patch adds device tree binding documentation for the SATA controller found on NVIDIA Tegra SoCs. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- v5: remove ordering requirement again .../devicetree/bindings/ata/tegra-sata.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/tegra-sata.txt